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SN65555 Datasheet(PDF) 2 Page - Texas Instruments |
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SN65555 Datasheet(HTML) 2 Page - Texas Instruments |
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SLDS031A – APRIL 1985 – REVISED APRIL 1993 4 –2 POST OFFICE BOX 655303 DALLAS, TEXAS 75265 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 40 39 38 37 36 35 34 33 32 31 30 29 28 27 26 25 24 23 22 21 Q16 Q17 Q18 Q19 Q20 Q21 Q22 Q23 Q24 Q25 Q26 Q27 Q28 Q29 Q30 Q31 Q32 SERIAL OUT CLOCK GND Q15 Q14 Q13 Q12 Q11 Q10 Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 OUTPUT ENABLE DATA IN LATCH ENABLE VCC1 VCC2 SN65556, SN75556 N PACKAGE (TOP VIEW) Q10 Q9 Q8 Q7 Q6 Q5 Q4 Q3 Q2 Q1 NC 39 38 37 36 35 34 33 32 31 30 29 18 19 7 8 9 10 11 12 13 14 15 16 17 Q22 Q23 Q24 Q25 Q26 Q27 Q28 Q29 Q30 Q31 Q32 20 21 22 23 SN65556, SN75556 FN PACKAGE (TOP VIEW) 5 4 3 21 6 44 42 41 40 43 24 25 26 27 28 NC – No internal connection logic symbols† 26 27 40 1 16 17 18 27 40 1 16 17 24 24 CMOS/EL DISP SRG 32 C1/ CLOCK DATA IN Q1 Q2 Q15 Q16 Q31 Q32 SERIAL OUT 2D 1D 2D 2D 2D 2D 2D 3 3 3 3 3 3 OUTPUT ENABLE VCC2 3 3 3 3 3 3 EN3 [PWR Q1-32] 2D 2D 2D 2D 2D 1D 2D SERIAL OUT Q32 Q31 Q18 Q17 Q2 Q1 18 26 DATA IN CLOCK 19 25 C1/ SRG 32 21 CMOS/EL DISP SN65555, SN75555 SN65556, SN75556 23 [PWR Q1-32] C2 EN3 C2 LATCH ENABLE LATCH ENABLE OUTPUT ENABLE VCC2 19 25 21 23 † These symbols are in accordance with ANSI/IEEE Std 91-1984 and IEC Publication 617-12. Pin numbers shown are for N packages. |
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