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PA7572P-20L Datasheet(PDF) 8 Page - Anachip Corp |
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PA7572P-20L Datasheet(HTML) 8 Page - Anachip Corp |
8 / 10 page Anachip Corp. www.anachip.com.tw Rev. 1.0 Dec 16, 2004 8/10 Table 5. A.C. Electrical Characteristics Sequential -20/I-20 Symbol Parameter 6,1 Min Max Unit tSCI Internal set-up to system clock 8 - LCC14 (tAL + tSK + tLC - tCK) 8 ns tSCX Input 16 (EXT.) set-up to system clock, - LCC (tIA + tSCI) 10 ns tCOI System-clock to Array Int. - LCC/IOC/INC 14 (tCK +tLC) 7 ns tCOX System-clock to Output Ext. - LCC (tCOI + tLO) 12 ns tHX Input hold time from system clock - LCC 0 ns tSK LCC Input set-up to async. clock 13 - LCC 1 ns tAK Clock at LCC or IOC - LCC output 1 ns tHK LCC input hold time from system clock - LCC 4 ns tSI Input set-up to system clock - IOC/INC 14 (tSK - tCK) 0 ns tHI Input hold time from system clock - IOC/INC (tSK - tCK) 5 ns tPK Array input to IOC PCLK clock 9 ns tSPI Input set-up to PCLK clock 17 - IOC/INC (tSK-tPK-tIA) 0 ns tHPI Input hold from PCLK clock 17 - IOC/INC (tPK+tIA-tSK) 10 ns tSD Input set-up to system clock - IOC/INC Sum-D (tIA + tAL + tLC + tSK - tCK) 10 ns tHD Input hold time from system clock - IOC Sum-D 0 ns tSDP Input set-up to PCLK clock - IOC Sum-D 15 (tIA + tAL + tLC + tSK - tPK) 7 ns tHDP Input hold time from PCLK clock - IOC Sum-D 0 ns tCK System-clock delay to LCC/IOC/INC 6 ns tCW System-clock low or high pulse width 7 ns fMAX1 Max. system-clock frequency Int/Int 1/(tSCI + tCOI) 66.6 MHz fMAX2 Max. system-clock frequency Ext/Int 1/(tSCX + tCOI) 58.8 MHz fMAX3 Max. system-clock frequency Int/Ext 1/(tSCI + tCOX) 50.0 MHz fMAX4 Max. system-clock frequency Ext/Ext 1/(tSCX + tCOX) 45.4 MHz fTGL Max. system-clock toggle frequency 1/(tCW + tCW) 9 71.4 MHz tPR LCC presents/reset to LCC output 1 ns tST Input to Global Cell present/reset (tIA + tAL + tPR) 15 ns tAW Asynch. preset/reset pulse width 8 ns tRT Input to LCC Reg-Type (RT) 8 ns tRTV LCC Reg-Type to LCC output register change 1 ns tRTC Input to Global Cell register-type change (tRT + tRTV) 9 ns tRW Asynch. Reg-Type pulse width 10 ns tRESET Power-on reset time for registers in clear state 2 5 µs |
Similar Part No. - PA7572P-20L |
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Similar Description - PA7572P-20L |
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