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SI8435DB Datasheet(PDF) 1 Page - Vaishali Semiconductor

Part No. SI8435DB
Description  Dual P-Channel 20-V (D-S) MOSFET
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Maker  VAISH [Vaishali Semiconductor]
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SI8435DB Datasheet(HTML) 1 Page - Vaishali Semiconductor

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This document is intended as a SPICE modeling guideline and does not constitute a commercial product data sheet. Designers should refer to the appropriate
data sheet of the same number for guaranteed specification limits.
Vishay Siliconix
SPICE Device Model Si8435DB
Document Number: 74146
Rev. A, 12-Dec-05
Dual P-Channel 20-V (D-S) MOSFET
• P-Channel Vertical DMOS
• Macro Model (Subcircuit Model)
• Level 3 MOS
• Apply for both Linear and Switching Application
• Accurate over the −55 to 125°C Temperature Range
• Model the Gate Charge, Transient, and Diode Reverse Recovery
The attached spice model describes the typical electrical
characteristics of the p-channel vertical DMOS.
The subcircuit
model is extracted and optimized over the
−55 to 125°C
temperature ranges under the pulsed 0-V to 5-V gate drive. The
saturated output impedance is best fit at the gate bias near the
threshold voltage.
A novel gate-to-drain feedback capacitance network is used to model
the gate charge characteristics while avoiding convergence difficulties
of the switched Cgd model. All model parameter values are optimized
to provide a best fit to the measured electrical data and are not
intended as an exact physical interpretation of the device.

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