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MB1507 Datasheet(PDF) 6 Page - Fujitsu Component Limited.

Part # MB1507
Description  SERIAL INPUT PLL FREQUENCY SYNTHESIZER
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Manufacturer  FUJITSU [Fujitsu Component Limited.]
Direct Link  http://edevice.fujitsu.com/fmd/en/index.html
Logo FUJITSU - Fujitsu Component Limited.

MB1507 Datasheet(HTML) 6 Page - Fujitsu Component Limited.

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MB1507
6
NOTES: Parenthesis data is used for setting divide ratio of programmable reference divider.
On rising edge of clock shifts one bit of data into the shift register.
t1, t2, t3, t4, t51µs
SERIAL DATA INPUT TIMING
Data
Clock
LE
S19=MSB
*(SW)
(S14)
S18
S11
(S7)
(S6)
S10
(S1)
S1=LSB
(C: CONTROL BIT)
C: CONTROL BIT
t3
t5
t1
t2
t4
PHASE CHARACTERISTICS
fr>fp
FC=H or open
FC=L
DO
ØR
ØP
fout
DO
fout
HL
L
(fr)L
H
Z
(fp)
Note:
Z=(High impedance)
VCO POLARITY
1
2
VCO INPUT VOLTAGE
FC pin is provided to change phase polarity of phase comparator. Characteris-
tics of internal charge pump output level (DO), phase comparator output level
(ØR, ØP) are reversed depending upon FC pin input level. Also, monitor pin
(fout) output level of phase comparator is controlled by FC pin input level.
Depending upon VCO polarity, FC pin should be set accordingly:
When VCO polarity are like
, FC should be set High or open circuit;
When VCO polarity are like
, FC should be set Low.
1
2
ØR
ØP
fr=fp
ZL
Z
Z
L
Z
(fp)
(fr)
fr<fp
LH
Z
(fr)H
L
L
(fp)


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