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LAN91C111 Datasheet(PDF) 3 Page - SMSC Corporation

Part No. LAN91C111
Description  10/100 Non-PCI Ethernet Single Chip MAC PHY
Download  142 Pages
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Maker  SMSC [SMSC Corporation]
Homepage  http://www.smsc.com
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LAN91C111 Datasheet(HTML) 3 Page - SMSC Corporation

 
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10/100 Non-PCI Ethernet Single Chip MAC + PHY
Datasheet
SMSC LAN91C111-REV B
3
Revision 1.8 (07-13-05)
DATASHEET
0.1
Datasheet Revision History
Table 0.1 LAN91C111 Datasheet Revision History
NAME
REVISION
LEVEL AND
DATE
SECTION/FIGURE/ENTRY
CORRECTION
K. Lawrence
Rev. 1.8
(07-13-05)
Chapter 14, "Timing
Diagrams," on page 125 -
(Figure 14.1, Figure 14.2, and
Figure 14.3), and Chapter 8,
MAC Data Structures and
Registers
Fixed t4 MIN/MAX values. Clarified CRC
in RX packet description.
Rev. 1.7
(11-16-04)
Ordering Information
Lead-free added.
Rev. 1.6
(05-18-04)
Chapter 14, "Timing
Diagrams," on page 125 -
(Figure 14.1, Figure 14.2, and
Figure 14.3)
Modified t1 and t4.
Rev. 1.6
(05-18-04)
Table 10.2, “Flow Of Events
For Restoring Device In
Normal Power Mode,” on
page 96
Modified description of restoring to normal
power mode.
Rev. 1.6
(05-18-04)
Section 7.7.17, "PHY
Powerdown," on page 50
Modified description of PHY power down
mode.
Rev. 1.5
(02-20-04)
Chapter 5, "Description of Pin
Functions," on page 23
Modified description of INTR0 pin active
high.
Rev. 1.5
(02-20-04)
Table 9.2, “MII Serial Port
Register MAP,” on page 84
Modified Reg.18 LNKFAIL bit to “0” by
default.
Rev. 1.4
(12-12-03)
Features
Removed “user programmable” under
LED Output features.
Rev. 1.3
(07-29-03)
Section 13.1, "Maximum
Guaranteed Ratings*," on
page 119
Modified LAN91C111 Temp 0
°C to +85°C.
Rev. 1.3
(07-18-03)
Section 8.2, "Receive Frame
Status," on page 54
Modified description of the BROADCAST
bit in Receive Frame Status.
Rev. 1.3
(07-18-03)
Section 8.5, "Bank 0 -
Transmit Control Register," on
page 57
Modified description of the STP_SQET bit
in TCR Register.
Rev. 1.3
(07-18-03)
Section 8.6, "Bank 0 - EPH
Status Register," on page 58
Modified description of SQET bit in EPH
Status Register.
Rev. 1.2
(09-17-02)
Section 8.12, "Bank 1 - Base
Address Register," on
page 65
Added chart showing decoding of I/O
Base Address 300h.
Rev. 1.0
(07-01-02)
Chapter 5, "Description of Pin
Functions," on page 23
Add Buffer Type for nLEDA and nLEDB,
Add description of LCLK.
Rev. 1.0
(07-01-02)
Section 7.7.12, "Link Integrity
& Autonegotiation," on
page 46
Modified Auto-Negotiation Enable
Description.
Rev. 1.0
(07-01-02)
Section 7.8, "Reset," on
page 51
Add Reset Description.


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