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A6278ELWTR-T Datasheet(PDF) 10 Page - Allegro MicroSystems

Part # A6278ELWTR-T
Description  Serial-Input Constant-Current Latched LED Drivers with Open LED Detection
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Manufacturer  ALLEGRO [Allegro MicroSystems]
Direct Link  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

A6278ELWTR-T Datasheet(HTML) 10 Page - Allegro MicroSystems

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Serial-Input, Constant-Current Latched
LED Drivers with Open LED Detection
A6278 and
A6279
10
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
Load Supply Voltage (VLED)
These devices are designed to operate with driver voltage
drops (VCE) of 0.7 to 3V, with an LED forward voltage, VF, of
1.2 to 4.0 V. If higher voltages are dropped across the driver,
package power dissipation will increase significantly. To mini-
mize package power dissipation, it is recommended to use the
lowest possible load supply voltage, VLED, or to set any series
voltage dropping, VDROP, according to the following formula:
VDROP = VLED – VF – VCE,
with VDROP = IO×RDROP for a single driver or for a Zener diode
(VZ), or for a series string of diodes (approximately 0.7 V per
diode) for a group of drivers (see figure 3). If the available volt-
age source, VLED, will cause unacceptable power dissipation and
series resistors or diodes are undesirable, a voltage regulator can
be used to provide supply voltages.
For reference, typical LED forward voltages are:
LED Type
VF (V)
White
3.5 to 4.0
Blue
3.0 to 4.0
Green
1.8 to 2.2
Yellow
2.0 to 2.1
Amber
1.9 to 2.65
Red
1.6 to 2.25
Infrared
1.2 to 1.5
Pattern Layout
This device has a common logic ground and power ground
terminal, GND. For the LP package, the GND pin should be tied
to the exposed metal pad, EP, allowing the ground plane copper
to be used to dissipate heat. If the ground pattern layout contains
large common mode resistance, and the voltage between the
system ground and the LATCH ENABLE, OUTPUT ENABLE,
or CLOCK terminals exceeds 2.5 V (because of switching noise),
these devices may not work properly.
Package Power Dissipation (PD)
The maximum allowable package power dissipation based on
package type is determined by:
PD(max) = (150 – TA) / RθJA,
where RθJA is the thermal resistance of the package, determined
experimentally. Power dissipation levels based on the package
are shown in the Package Thermal Characteristics section (see
page 14).
The actual package power dissipation is determined by:
PD(act) = DC ×(VCE ×IO×16) + (VDD×IDD),
where DC is the duty cycle. The value 16 represents the maxi-
mum number of available device outputs for the A6279, used for
the worst-case scenario (displaying all 16 LEDs; this would be 8
for the A6278).
When the load suppy voltage, VLED, is greater than 3 to 5 V, and
PD(act) > PD(max), an external voltage reducer (VDROP) must be
used (see figure 3).
Reducing the percent duty cycle, DC, will also reduce power dis-
sipation. Typical results are shown on the following pages.
Application Information
VLED
VDROP
VF
VCE
VLED
VDROP
VF
VCE
VLED
VDROP
VF
VCE
Figure 3. Typical appplications for voltage drops


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