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A6278 Datasheet(PDF) 3 Page - Allegro MicroSystems

Part # A6278
Description  Serial-Input Constant-Current Latched LED Drivers with Open LED Detection
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Manufacturer  ALLEGRO [Allegro MicroSystems]
Direct Link  http://www.allegromicro.com
Logo ALLEGRO - Allegro MicroSystems

A6278 Datasheet(HTML) 3 Page - Allegro MicroSystems

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Serial-Input, Constant-Current Latched
LED Drivers with Open LED Detection
A6278 and
A6279
3
Allegro MicroSystems, Inc.
115 Northeast Cutoff, Box 15036
Worcester, Massachusetts 01615-0036 (508) 853-5000
www.allegromicro.com
3
4
5
6
7
8
2
1
14
13
12
11
10
9
15
16
EP
GND
SERIAL DATA IN
CLOCK
LATCH ENABLE
OUT0
OUT1
OUT2
OUT3
LOGIC SUPPLY
REXT
SERIAL DATA OUT
OUTPUT ENABLE
OUT7
OUT6
OUT5
OUT4
Terminal List Table
Package A, LW, LP
16-pin
Pin-out Diagrams
Number
Name
Function
A, LW, LP
A6278
A6279
1
1
GND
Reference terminal for logic ground and power ground
2
2
SERIAL DATA IN
Serial-data input to the shift-register
3
3
CLOCK
Clock input terminal; data is shifted on the rising edge of the clock.
4
4
LATCH ENABLE
Data strobe input terminal; serial data is latched with a high-level input
5 TO 12
5 TO 20
OUTx
Current-sinking output terminals
13
21
OUTPUT ENABLE
(Active low) Set low to enable output drivers; set high to turn OFF
(blank) all output drivers
14
22
SERIAL DATA OUT
CMOS serial-data output; for cascading to the next device (to that
device SERIAL DATA IN pin); for reading OCD bits.
15
23
REXT
An external resistor at this terminal establishes the output current for all
of the sink drivers.
16
24
LOGIC SUPPLY
(VDD) Logic supply voltage (typically 3.3 or 5.0 V)
NC
No connection
EP
LP and ET packages only; exposed thermal pad for heat dissipation
3
4
5
6
7
8
2
1
9
10
12
13
14
15
16
17
18
19
20
21
22
23
24
11
EP
GND
SERIAL DATA IN
CLOCK
LATCH ENABLE
OUT0
OUT1
OUT2
OUT3
OUT4
OUT5
OUT6
OUT7
LOGIC SUPPLY
REXT
SERIAL DATA OUT
OUTPUT ENABLE
OUT15
OUT14
OUT13
OUT12
OUT11
OUT10
OUT9
OUT8
Package A, LW, LP
24-pin


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