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SI8251-IM Datasheet(PDF) 9 Page - Silicon Laboratories |
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SI8251-IM Datasheet(HTML) 9 Page - Silicon Laboratories |
9 / 30 page Si8250/1/2 Preliminary Rev. 0.8 9 Table 8. DPWM Specifications TA = –40 to +125 °C, VDD = 2.5 V, SYSCLK = 25 MHz, PLLCLK = 200 MHz unless otherwise specified. Parameter Conditions Min Typ Max Units Clock Frequency DPWMSP[4:3] = 00 — — 200 MHz DPWMSP[4:3] = 01 — — 50 DPWMSP[4:3] = 1x — — 25 Resolution No dithering — — 9 Bits Dithering enabled — — 15 Time Resolution DPWMSP[4:3] = 00 5 — — ns DPWMSP[4:3] = 01 20 — — DPWMSP[4:3] = 1x 40 — — SYNC Pulse set-up time SYNC signal minimum LOW time before positive transition 3— — DPWM clock cycles PH Rise, Fall Time 50pF on pin — — 5 ns Output Resistance High IOUT =–5mA — 75 — Ω Output Resistance Low IOUT =8mA — 40 — Ω Shutdown Supply Current — — 0.1 µA Table 9. Bandgap Voltage Reference Specs TA = –40 to +125 °C, VDD = 2.5 V, SYSCLK = 25 MHz, PLLCLK = 200 MHz unless otherwise specified. Parameter Conditions Min Typ Max Units Output Voltage — 1.20 — V Temperature Stability –1 — +1 % Turn-on Response (0.01%, 4.7 µF) — 6.5 — ms no load — 2 — µs Noise 4.7 µF — 2 — µV (RMS) Bandgap Current — 60 — µA Reference Buffer Current — 30 — µA Power supply rejection — 50 — dB |
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