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C8051F005 Datasheet(PDF) 1 Page - Silicon Laboratories |
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C8051F005 Datasheet(HTML) 1 Page - Silicon Laboratories |
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1 / 2 page  Precision Mixed Signal Copyright © 2004 by Silicon Laboratories 6.15.2004 Port 0 Latch Port 1 Latch JTAG Logic TCK TMS TDI TDO UART SMBus SPI Bus 5-Chnl PCA 32 kB FLASH 2048 Byte XRAM VDD Monitor SFR Bus Port 2 Latch Port 3 Latch 8 0 5 1 C o r e Timers 0,1,2 Timer 3 P1.0 P1.1 P1.2 P1.3 P1.4 P1.5 P1.6 P1.7 P 1 D r v P0.0 P0.1 P0.2 P0.3 P0.4 P0.5 P0.6 P0.7 P 0 D r v P3.0 P3.1 P3.2 P3.3 P3.4 P3.5 P3.6 P3.7 P 3 D r v P2.0 P2.1 P2.2 P2.3 P2.4 P2.5 P2.6 P2.7 P 2 D r v C R O S S B A R S W I T C H AV+ AV+ VDD VDD VDD DGND DGND DGND AGND AGND Reset RST XTAL1 XTAL2 External Oscillator Circuit System Clock Internal Oscillator Digital Power Analog Power Debug HW Boundary Scan 256 Byte RAM WDT DAC1 DAC1 (12-Bit) DAC0 (12-Bit) ADC 100 ksps (12-Bit) A M U X AIN0.0 AIN0.1 AIN0.2 AIN0.3 AIN0.4 AIN0.5 AIN0.6 AIN0.7 DAC0 CP0+ CP0- CP1+ CP1- TEMP SENSOR VREF Prog Gain CP0 CP1 VREF C8051F005 25 MIPS, 32 kB Flash, 12-Bit ADC, 64-Pin Mixed-Signal MCU Analog Peripherals 12-Bit ADC - ±1 LSB INL; no missing codes - Programmable throughput up to 100 ksps - 8 external inputs; programmable as single-ended or differential - Programmable amplifier gain: 16, 8, 4, 2, 1, 0.5 - Data-dependent windowed interrupt generator - Built-in temperature sensor (±3 °C) Two 12-Bit DACs - Voltage output - 10 µsec settling time Two Comparators - 16 programmable hysteresis values - Configurable to generate interrupts or reset Internal Voltage Reference VDD Monitor/Brown-out Detector On-Chip JTAG Debug - On-chip emulation circuitry facilitates full-speed, non-intrusive, in-circuit emulation - Supports breakpoints, single stepping, watchpoints, inspect/modify memory, and registers - Superior performance to emulation systems using ICE-chips, target pods, and sockets - Fully compliant with IEEE 1149.1 specification High-Speed 8051 µC Core - Pipelined instruction architecture; executes 70% of Instructions in 1 or 2 system clocks - Up to 25 MIPS throughput with 25 MHz clock - Expanded interrupt handler; up to 21 interrupt sources Memory - 2304 bytes data RAM - 32 kB Flash; in-system programmable in 512-byte sectors (512 bytes are reserved) Digital Peripherals - 32 port I/O; all are 5 V tolerant - Hardware SMBus™ (I2C™ compatible), SPI™, and UART serial ports available concurrently - Programmable 16-bit counter/timer array with five capture/compare modules - 4 general-purpose 16-bit counter/timers - Dedicated watchdog timer; bidirectional reset Clock Sources - Internal programmable oscillator: 2–16 MHz - External oscillator: Crystal, RC, C, or Clock - Can switch between clock sources on-the-fly Supply Voltage: 2.7 to 3.6 V - Typical operating current: 12.5 mA at 25 MHz - Multiple power saving sleep and shutdown modes 64-Pin TQFP Temperature Range: –40 to +85 °C |
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