 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
DSP16410CG Datasheet(PDF) 48 Page - Agere Systems |
|
||||||||||||||||||||||||||||||
DSP16410CG Datasheet(HTML) 48 Page - Agere Systems |
|
|
48 / 314 page  Data Sheet DSP16410CG Digital Signal Processor May 2003 48 Agere Systems—Proprietary Agere Systems Inc. Use pursuant to Company instructions 4 Hardware Architecture (continued) 4.8 Interprocessor Communication (continued) 4.8.2 Message Buffer Data Exchange (continued) The receiving core can use interrupts or polling to detect the presence of an incoming message. When the receiving core reads mgi, the following steps occur: 1. After one instruction cycle of latency, the DSP16410CG sets the receiving core’s MGIBE flag. 2. After an additional instruction cycle of latency, the DSP16410CG clears the transmitting core’s MGOBF flag. 4.8.2.1 Message Buffer Write Protocol To ensure an older message has been processed by the receiving core, the transmitting core must not write a new message to mgo until its MGOBF flag is cleared. The example code segment below is executed by the transmitting core: if mgobf goto . // Wait for old message // to be read. mgo=*r0++ // Write new message. 4.8.2.2 Message Buffer Read Protocol The receiving core can detect an incoming message by enabling the MGIBF interrupt in the inc1 register (Table 149 on page 239). The following is an example of a simple interrupt service routine for the receiving core: ISR: a0h=mgi *r0++=a0h // Read new message and // clear MGIBF. ireturn As an alternative to the interrupt-directed message buffer read protocol described above, the receiving core can poll its MGIBE flag for the arrival of a new message. The example code segment below is exe- cuted by the receiving core: if mgibe goto . // Wait for new // message. a0h=mgi *r0++=a0h // Read new message. The DSP16410CG can operate a full-duplex communi- cation channel between CORE0 and CORE1, with each core using its own mgi and mgo registers and its own MGOBF and MGIBE flags. Table 13 illustrates two code segments for a full-duplex data exchange of N words between CORE0 and CORE1. This segment exchanges two words (one input, one output) between the two cores every 18 CLK cycles. Table 13. Full-Duplex Data Transfer Code Through Core-to-Core Message Buffer CORE0 Message Buffer Transfer Code CORE1 Message Buffer Transfer Code c0=1-N xfer: if mgobf goto . mgo=*r0++ //Write message to //CORE1 and set MGOBF. //4 cycles latency //until CORE1’s MGIBE //is cleared. if mgibe goto . //Wait for CORE1 //message to arrive. a0h=mgi *r1++=a0h //Read CORE1 message //and clear CORE1’s //MGOBF. if c0lt goto xfer c0=1-N xfer: if mgobf goto . mgo=*r1++ //Write message to //CORE0 and set MGOBF. //4 cycles latency //until CORE0’s MGIBE //is cleared. if mgibe goto . //Wait for CORE0 //message to arrive. a0h=mgi *r0++=a0h //Read CORE0 message //and clear CORE0’s //MGOBF. if c0lt goto xfer |
Similar Part No. - DSP16410CG |
|
Similar Description - DSP16410CG |
|
|
Link URL |
| Privacy Policy |
| ALLDATASHEET.COM |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Datasheet Upload | Contact us | Privacy Policy | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
