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SII1292CNUC Datasheet(PDF) 5 Page - Silicon image

Part # SII1292CNUC
Description  MHL Bridge and HDMI Monitor Receiver
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Manufacturer  SILICONIMAGE [Silicon image]
Direct Link  http://www.siliconimage.com
Logo SILICONIMAGE - Silicon image

SII1292CNUC Datasheet(HTML) 5 Page - Silicon image

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SiI1292 MHL Bridge and HDMI Monitor Receiver
Data Brief
Silicon Image, Inc.
© 2010-2011 Silicon Image, Inc. All rights reserved.
ePad Requirements
The SiI1292 chip is packaged in a 40-pin QFN package with an Exposed Pad™ (ePad™), used both for electrical
connectivity and for improved thermal transfer characteristics. The ePad dimensions are shown on the following page.
Soldering of the ePad is required to meet package power dissipation requirements at full speed operation, and to
correctly connect the chip circuitry to electrical ground.
Note: The ePad must be soldered to the PCB ground. Provide a landing area on the PCB with dimensions and
location corresponding to the ePad within the footprint of the package. The size of this landing area can be larger than
the ePad on the package but should be at least the same as the maximum size of exposed pad of the package (2.50 mm x
2.50 mm). If any circuit traces are within the area of the maximum size of the ePad, the trace may short to the pad if the
package has a pad with the maximum dimensions.
The thermal land area on the PCB can use thermal vias to improve heat removal from the package. These thermal vias
can double as ground connections, attaching internally in the PCB to the ground plane. An array of vias should be
designed into the PCB beneath the package. For optimum thermal performance, Silicon Image recommends the diameter
of vias set within 12 mils to 13 mils (0.30 mm to 0.33 mm) and the via barrel be plated with 1-ounce copper to plug the
via. This is desirable to avoid any solder wicking inside the via during the soldering process, which may result in voids
in solder between the exposed pad and the thermal land. If the copper plating does not plug the vias, the thermal vias can
be tented with solder mask on the top surface of the PCB to avoid solder wicking inside the via during assembly. The
solder mask diameter should be at least 4 mils (0.1 mm) larger than the via diameter.
Package stand-off is also a consideration. For a nominal stand-off of approximately 0.1 mm (see dimension A1), the
stencil thickness of 5 mils to 8 mils provide a good solder joint between the ePad and the thermal land.

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