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GS9062 Datasheet(PDF) 11 Page - Gennum Corporation |
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GS9062 Datasheet(HTML) 11 Page - Gennum Corporation |
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11 / 46 page  GS9062 Data Sheet 22209 - 5 May 2005 11 of 46 67 DETECT_TRS Non Synchronous Input CONTROL SIGNAL INPUT Signal levels are LVCMOS/LVTTL compatible. Used to select the timing mode of the device. When set HIGH, the device will lock the internal flywheel to the embedded TRS timing signals in the parallel input data. When set LOW, the device will lock the internal flywheel to the externally supplied H, V, and F input signals. 69 PCLK – Input PARALLEL DATA BUS CLOCK Signal levels are LVCMOS/LVTTL compatible. SD 20-bit mode PCLK = 13.5MHz SD 10-bit mode PCLK = 27MHz 72 LOCKED Synchronous with PCLK Output STATUS SIGNAL OUTPUT Signal levels are LVCMOS / LVTTL compatible. The LOCKED signal will be HIGH whenever the device has correctly received and locked to SMPTE compliant data in SMPTE mode or DVB-ASI compliant data in DVB-ASI mode. It will be LOW otherwise. 73, 74 VCO, VCO Analog Input Differential inputs for the external VCO reference signal. For single ended devices such as the GO1525, VCO should be AC coupled to VCO_GND. 75 VCO_GND – Output Power Ground reference for the external voltage controlled oscillator. Connect to pins 2, 4, 6, and 8 of the GO1525. This pin is an output. Should be isolated from all other grounds. 76 VCO_VCC – Output Power Power supply for the external voltage controlled oscillator. Connect to pin 5 of the GO1525. This pin is an output. Should be isolated from all other power supplies. 77 LF Analog Output Control voltage to external voltage controlled oscillator. Nominally +1.25V DC. 78 CP_CAP Analog Input PLL lock time constant capacitor connection. Normally connected to VCO_GND through 2.2nF. 79 LB_CONT Analog Input Control voltage to set the loop bandwidth of the integrated reclocker. 80 CP_GND – Power Ground connection for the charge pump. Connect to analog GND. Table 1-1: Pin Descriptions (Continued) Pin Number Name Timing Type Description |
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