DS1085L

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COMMAND SET

Data and control information is read from and written to the DS1085L in the format shown in Figure 3.

After receiving an acknowledge, the bus master provides a command protocol. After receiving this

protocol, the DS1085L issues an acknowledge, and then the master can send data to the DS1085L. If the

DS1085L is to be read, the master must send the command protocol as before, and then issue a repeat

the data from the DS1085L. The command set for the DS1085L is listed as follows:

Access DAC [08h]

DAC register. This is a 2-byte transfer, the first byte contains the eight MSBs, and the second byte

contains the two LSBs in the most significant positions of the data byte. The remaining six bits are

ignored and can be written with any value (if read, these bits are 0).

Access OFFSET [0Eh]

OFFSET register. This is a single-byte transfer of which only the five LSBs (last five bits) are used. The

remaining three bits can be written with any value to complete the data byte (if read, these bits are 1).

Access DIV [01h]

DIV register. This register has a 10-bit value. The upper eight bits are sent first, followed by a second

byte that contains the two LSBs of the register value in the most significant positions of the data byte.

The remaining six bits are ignored and can be set to any value (if read, these bits are 0).

Access MUX [02h]

MUX register. This register has a 10-bit value. The upper eight bits are sent first, followed by a second

byte that contains the two LSBs of the register value in the most significant positions of the data byte.

The remaining six bits are ignored and can be set to any value (if read, these bits are 0).

Access ADDR [0Dh]

ADDR register. This is a single-byte transfer. This register has a 5-bit value, the first three bits of a write

can be any value followed by the five active bits (if read, the first three bits are 0).