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IC63LV1024-8K Datasheet(PDF) 2 Page - Integrated Circuit Solution Inc |
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IC63LV1024-8K Datasheet(HTML) 2 Page - Integrated Circuit Solution Inc |
2 / 10 page IC63LV1024 2 Integrated Circuit Solution Inc. AHSR025-0D 04/16/2004 ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc. 128K x 8 HIGH-SPEED CMOS STATIC RAM 3.3V REVOLUTIONARY PINOUT FEATURES • High-speed access times: 8, 10, 12 and 15 ns • High-performance, low-power CMOS process • Multiple center power and ground pins for greater noise immunity • Easy memory expansion with CE and OE options • CE power-down • Fully static operation: no clock or refresh required • TTL compatible inputs and outputs • Single 3.3V power supply • Packages available: – 32-pin 300mil SOJ – 32-pin 400mil SOJ – 32-pin 400mil TSOP-2 – 36-pin TF-BGA (6mmx8mm) DESCRIPTION The ICSI IC63LV1024 is a very high-speed, low power, 131, 072-word by 8-bit CMOS static RAM in revolutionary pinout. The IC63LV1024 is fabricated using ICSI's high-perform- ance CMOS technology. This highly reliable process coupled with innovative circuit design techniques, yields higher performance and low power consumption devices. When CE is HIGH (deselected), the device assumes a standby mode at which the power dissipation can be reduced down to 250 µW (typical) with CMOS input levels. The IS63LV1024 operates from a single 3.3V power supply and all inputs are TTL-compatible. The IS63LV1024 is available in 32-pin 300mil SOJ, 400mil SOJ, 400mil TSOP-2 and 36-pin TF-BGA (6mmx8mm). FUNCTIONAL BLOCK DIAGRAM A0-A16 CE OE WE 128K X 8 MEMORY ARRAY DECODER COLUMN I/O CONTROL CIRCUIT GND VCC I/O DATA CIRCUIT I/O0-I/O7 |
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