N16D1633LPA

Stock No. 23395- Rev L 1/06

11

The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.

Advance Information

NanoAmp Solutions, Inc.

Burst Length

Read and write accesses to the SDRAM are burst oriented, with the burst length being programmable, as shown in

Figure 1. The burst length determines the maximum number of column locations that can be accessed for a given

READ or WRITE command. Burst lengths of 1, 2, 4 or 8 locations are available for both the sequential and the

interleaved burst types, and a full-page burst is available for the sequential type. The full-page burst is used in

conjunction with the BURST TERMINATE command to generate arbitrary burst lengths.

Reserved states should not be used, as unknown operation or incompatibility with future versions may result. When a

READ or WRITE command is issued, a block of columns equal to the burst length is effectively selected. All accesses

for that burst take place within this block, meaning that the burst will wrap within the block if a boundary is reached. The

block is uniquely selected by A1-A7 when the burst length is set to two; by A2-A7 when the burst length is set to four;

and by A3-A7 when the burst length is set to eight. The remaining (least significant) address bit(s) is (are) used to

select the starting location within the block. Full-page bursts wrap within the page if the boundary is reached.

Bank(Row) Active

The Bank Active command is used to activate a row in a specified bank of the device. This command is initiated by

activating /CS, /RAS and deasserting /CAS, /WE at the positive edge of the clock. The value on the A11 selects the

bank, and the value on the A0-A10 selects the row. This row remains active for column access until a precharge

command is issued to that bank. Read and write operations can only be initiated on this activated bank after the

minimum tRCD time is passed from the activate command.

Read

The READ command is used to initiate the burst read of data. This command is initiated by activating /CS, /CAS, and

deasserting /WE, /RAS at the positive edge of the clock. A11 input select the bank, A0-A7 address inputs select the

starting column location. The value on input A10 determines whether or not Auto Precharge is used. If Auto Precharge

is selected the row being accessed will be precharged at the end of the READ burst; if Auto Precharge is not selected,

the row will remain active for subsequent accesses. The length of burst and the CAS latency will be determined by the

values programmed during the MRS command.

Write

The WRITE command is used to initiate the burst write of data. This command is initiated by activating /CS, /CAS, /WE

and deasserting /RAS at the positive edge of the clock. A11 input select the bank, A0-A7 address inputs select the

starting column location. The value on input A10 determines whether or not Auto Precharge is used. If Auto Precharge

is selected the row being accessed will be precharged at the end of the WRITE burst; if Auto Precharge is not selected,

the row will remain active for subsequent accesses.