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N02M0818L2A Datasheet(PDF) 3 Page - NanoAmp Solutions, Inc.

Part No. N02M0818L2A
Description  2Mb Ultra-Low Power Asynchronous Medical CMOS SRAM 256Kx8 bit
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Maker  NANOAMP [NanoAmp Solutions, Inc.]
Homepage  http://www.nanoamp.com
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N02M0818L2A Datasheet(HTML) 3 Page - NanoAmp Solutions, Inc.

   
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(DOC#14-02-036 Rev C ECN#01-0887)
3
The specifications of this device are subject to change without notice. For latest documentation see http://www.nanoamp.com.
NanoAmp Solutions, Inc.
N02M0818L2A
Absolute Maximum Ratings1
1. Stresses greater than those listed above may cause permanent damage to the device. This is a stress rating only and functional
operation of the device at these or any other conditions above those indicated in the operating section of this specification is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability.
Item
Symbol
Rating
Unit
Voltage on any pin relative to VSS
VIN,OUT
–0.3 to VCC+0.3
V
Voltage on VCC Supply Relative to VSS
VCC
–0.3 to 3.0
V
Power Dissipation
PD
500
mW
Storage Temperature
TSTG
–40 to 125
oC
Operating Temperature
TA
-20 to +60
oC
Soldering Temperature and Time
TSOLDER
240oC, 10sec(Lead only)
oC
Recommended Operating Limits (Not all inclusive values tested)1
1. These limits are the expected operating conditions for this device. Only selected points within this range of conditions
are specifically tested and guaranteed.
Item
Symbol
Test Conditions
Min.
Max
Unit
Core Supply Voltage
VCC
1.3
2.3
V
Data Retention Voltage
VDR
Chip Disabled (Note 3)
1.0
V
Input High Voltage
VIH
0.7VCCQ VCCQ+0.5
V
Input Low Voltage
VIL
–0.5
0.3VCCQ
V
Output High Voltage
VOH
IOH = 0.2mA
VCCQ–0.3
V
Output Low Voltage
VOL
IOL = -0.2mA
0.3
V
Input Leakage Current
ILI
VIN = 0 to VCC
0.1
µA
Output Leakage Current
ILO
OE = VIH or Chip Disabled
0.1
µA
Read/Write Operating Supply Current
@ 1
µs Cycle Time2
2. This parameter is specified with the outputs disabled to avoid external loading effects. The user must add current
required to drive output capacitance expected in the actual system.
ICC1
VCC=2.3 V, VIN=VIH or VIL
Chip Enabled, IOUT = 0
2.5
mA
Read/Write Operating Supply Current
@ 85 ns Cycle Time2
ICC2
VCC=2.3 V, VIN=VIH or VIL
Chip Enabled, IOUT = 0
13.0
mA
Standby Current3
3. The chip is Disabled when CE1# is high or CE2 is low or UB# and LB# are high. The chip is Enabled when CE1# is
low and CE2 is high.
ISB1
VIN = VCC or 0V
Chip Disabled
tA= 37oC, VCC = 2.3 V
450
nA
Data Retention Current3
IDR
VCC = 1.0V, VIN = VCC or 0
Chip Disabled, tA= 85oC
1.0
µA


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