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IC41C4105 Datasheet(PDF) 8 Page - Integrated Circuit Solution Inc

Part No. IC41C4105
Description  1Mx4 bit Dynamic RAM with Fast Page Mode
Download  17 Pages
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Manufacturer  ICSI [Integrated Circuit Solution Inc]
Direct Link  http://www.icsi.com.tw
Logo ICSI - Integrated Circuit Solution Inc

IC41C4105 Datasheet(HTML) 8 Page - Integrated Circuit Solution Inc

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IC41C4105 and IC41LV4105
8
Integrated Circuit Solution Inc.
DR019-0A 08/01/2001
AC CHARACTERISTICS (Continued)(1,2,3,4,5,6)
(Recommended Operating Conditions unless otherwise noted.)
-35
-
50
-
60
Symbol
Parameter
Min.
Max.
Min.
Max.
Min.
Max.
Units
tACH
Column-Address Setup Time to
CAS
15
15
15
ns
Precharge during WRITE Cycle
tOEH
OE Hold Time from WE during
8
10
15
ns
READ-MODIFY-WRITE cycle(18)
tDS
Data-In Setup Time(15, 22)
0
0
0
ns
tDH
Data-In Hold Time(15, 22)
6
8
10
ns
tRWC
READ-MODIFY-WRITE Cycle Time
80
125
140
ns
tRWD
RAS to WE Delay Time during
45
70
80
ns
READ-MODIFY-WRITE Cycle(14)
tCWD
CAS to WE Delay Time(14, 20)
25
34
36
ns
tAWD
Column-Address to
WE Delay Time(14)
30
42
49
ns
tPC
Fast Page Mode READ or WRITE
12
20
25
ns
Cycle Time
tRASP
Fast Page Mode
RAS Pulse Width
35
100K
50
100K
60
100K
ns
tCPA
Access Time from
CAS Precharge(15)
-21
-
27
-
34
ns
tPRWC
Fast Page Mode READ-WRITE Cycle Time
40
47
56
ns
tOFF
Output Buffer Turn-Off Delay from
3
15
3
15
3
15
ns
CAS or RAS(13,15,19, 24)
tCSR
CAS Setup Time (CBR REFRESH)(20, 25)
8
10
10
ns
tCHR
CAS Hold Time (CBR REFRESH)( 21, 25)
8
10
10
ns
tORD
OE Setup Time prior to RAS during
0
0
0
ns
HIDDEN REFRESH Cycle
tREF
Auto Refresh Period 1,024 Cycles
16
16
16
ms
tT
Transition Time (Rise or Fall)(2, 3)
115
1
50
1
50
ns
AC TEST CONDITIONS
Output load:
Two TTL Loads and 50 pF (Vcc = 5.0V + 10%)
One TTL Load and 50 pF (Vcc = 3.3V + 10%)
Input timing reference levels:
VIH = 2.4V, VIL = 0.8V (Vcc = 5.0V + 10%)
VIH = 2.4V, VIL = 0.8V (Vcc = 3.3V + 10%)
Output timing reference levels: VOH = 2.0V, VOL = 0.8V (Vcc = 5.0V + 10%, 3.3V + 10%)


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