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IC41C4105 Datasheet(PDF) 2 Page - Integrated Circuit Solution Inc |
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IC41C4105 Datasheet(HTML) 2 Page - Integrated Circuit Solution Inc |
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2 / 17 page  IC41C4105 and IC41LV4105 2 Integrated Circuit Solution Inc. DR019-0A 08/01/2001 FEATURES • Fast Page Mode Access Cycle • TTL compatible inputs and outputs • Refresh Interval: -- 1,024 cycles/16 ms • Refresh Mode: RAS-Only, CAS-before-RAS (CBR), and Hidden • JEDEC standard pinout • Single power supply: 5V ± 10% or 3.3V ± 10% • Byte Write and Byte Read operation via two CAS DESCRIPTION The ICSI 4105 Series is a 1,048,576 x 4-bit high-performance CMOS Dynamic Random Access Memory. The Fast Page Mode allows 1,024 random accesses within a single row with access cycle time as short as 12 ns per 4-bit word. These features make the 4105 Series ideally suited for high- bandwidth graphics, digital signal processing, high-performance computing systems, and peripheral applications. The 4105 Series is packaged in a 20-pin 300mil SOJ and a 20 pin TSOP-2 1M x 4 (4-MBIT) DYNAMIC RAM WITH FAST PAGE MODE KEY TIMING PARAMETERS Parameter - 35 -50 - 60 Unit RAS Access Time (tRAC)35 50 60 ns CAS Access Time (tCAC)10 14 15 ns Column Address Access Time (tAA)18 25 30 ns Fast Page Mode Cycle Time (tPC)12 20 25 ns Read/Write Cycle Time (tRC) 60 90 110 ns ICSI reserves the right to make changes to its products at any time without notice in order to improve design and supply the best possible product. We assume no responsibility for any errors which may appear in this publication. © Copyright 2000, Integrated Circuit Solution Inc. PRODUCT SERIES OVERVIEW Part No. Refresh Voltage IC41C4105 1K 5V ± 10% IC41LV4105 1K 3.3V ± 10% PIN DESCRIPTIONS A0-A9 Address Inputs I/O0-3 Data Inputs/Outputs WE Write Enable OE Output Enable RAS Row Address Strobe CAS Column Address Strobe Vcc Power GND Ground PIN CONFIGURATION 20 (26) Pin SOJ, TSOP-2 |
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