ADM1041

Rev. A | Page 35 of 64

START BY

MASTER

STOP BY

MASTER

ACK. BY

ADM1041

ACK. BY

ADM1041

ACK. BY

ADM1041

A6

19

1

9

9

A5

A4

A3

A2

A1

A0

R/W

D7

D6

D5

D4

D3

D2

D1

D0

SCLK

SDATA

FRAME 1

SERIAL BUS ADDRESS BYTE

FRAME 2

ADDRESS POINTER REGISTER BYTE

FRAME 3

DATA BYTE

SDATA (CONTINUED)

SCLK (CONTINUED)

9

1

D7

D6

D5

D4

D3

D2

D1

D0

Figure 25. Writing a Register Address to the Address Pointer Register, then Writing Data to the Selected Register

STOP BY

MASTER

ACK. BY

ADM1041

ACK. BY

ADM1041

START BY

MASTER

SCLK

SDATA

11

9

9

A6

A5

A4

A3

A2

A1

A0

R/W

D7

D6

D5

D4

D3

D2

D1

D0

FRAME 1

SERIAL BUS ADDRESS BYTE

FRAME 2

ADDRESS POINTER REGISTER BYTE

Figure 26. Writing to the Address Pointer Register Only

STOP BY

MASTER

START BY

MASTER

ACK. BY

ADM1041

ACK. BY

ADM1041

R/W

SCLK

11

9

9

SDATA

A6

A5

A4

A3

A2

A1

A0

D7

D6

D5

D4

D3

D2

D1

D0

FRAME 1

SERIAL BUS ADDRESS BYTE

FRAME 2

DATA BYTE FROM ADM1041

Figure 27. Reading Data from a Previously Selected Register

Table 6. Device SMBus Addresses

ADD1

ADD0

A2

A1

A0

Target Device

0

GND

0

0

0

0

0

0

0

1

1

0

NC

1

0

0

4

1

GND

0

1

0

2

1

0

1

1

3

1

NC

1

0

1

5

Note: ADD1 is low by default. To access the additional three addresses it is necessary to set Config 4 < 1 > high and then perform a power cycle to allow the new

address to be latched after the EEPROM download. Refer to the section on Extended SMBUS Addressing for more details.