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HY5V52LFP-S Datasheet(PDF) 12 Page - Hynix Semiconductor |
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HY5V52LFP-S Datasheet(HTML) 12 Page - Hynix Semiconductor |
12 / 13 page Rev. 0.1 / June. 2004 12 Preliminary HY5V52(L)F(P) Series 4Banks x 2M x 32bits Synchronous DRAM COMMAND TRUTH TABLE Command CKEn-1 CKEn CS RAS CAS WE DQM ADDR A10/AP BA Note Mode Register Set H X L L L L X OP code No Operation H X HX X X XX LH H H Bank Active H X L L H H X RA V Read HX L H L H X CA L V Read with Autoprecharge H Write HX L H L L X CA L V Write with Autoprecharge H Precharge All Banks HX L L H L X X HX Precharge selected Bank LV Burst Stop H X L H H L X X DQM H X V X Auto Refresh H H L L L H X X Burst-Read-Single-WRITE H X L L L L X A9 ball High (Other balls OP code) MRS Mode Self Refresh1 Entry H L L L L H X X Exit L H HX X X X LH H H Precharge power down Entry H L HX X X X X LH H H Exit L H HX X X X LH H H Clock Suspend Entry H L HX X X X X LV V V Exit L H X X |
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