6

SMS8198

2036 5.0 4/18/00

General Description

communication between different integrated circuits. The

two lines are: a serial data line (SDA), and a serial clock

line (SCL). The SDA line must be connected to a positive

supply by a pull-up resistor, located somewhere on the

bus. Data transfer between devices may be initiated with

a START condition only when SCL and SDA are HIGH

(bus is not busy).

Input Data Protocol

One data bit is transferred during each clock pulse. The

data on the SDA line must remain stable during clock

HIGH time, because changes on the data line while SCL

is HIGH will be interpreted as start or stop condition (See

Figure 2).

START and STOP Conditions

When both the data and clock lines are HIGH, the bus is

said to be not busy. A HIGH-to-LOW transition on the data

line, while the clock is HIGH, is defined as the “START”

condition. A LOW-to-HIGH transition on the data line,

while the clock is HIGH, is defined as the “STOP” condi-

tion (See Figure 3).

DEVICE OPERATION

The protocol defines any device that sends data onto the

bus as a “transmitter” and any device which receives data

as a “receiver.” The device controlling data transmission

is called the “master” and the controlled device is called

the “slave.” In all cases, the SMS8198 will be a “slave”

device, since it never initiates any data transfers.

Acknowledge (ACK)

Acknowledge is a software convention used to indicate

successful data transfers. The transmitting device, either

the master or the slave, will release the bus after transmit-

Figure 5. Slave Address Byte

ting eight bits. During the ninth clock cycle, the receiver will

pull the SDA line LOW to ACKnowledge that it received the

eight bits of data (See Figure 4).

The SMS8198 will respond with an ACKnowledge after

recognition of a START condition and its slave address

byte. If both the device and a write operation are selected,

the SMS8198 will respond with an ACKnowledge after the

receipt of each subsequent 8-bit word.

In the READ mode, the SMS8198 transmits eight bits of

data, then releases the SDA line, and monitors the line for

an ACKnowledge signal. If an ACKnowledge is detected,

and no STOP condition is generated by the master, the

SMS8198 will continue to transmit data. If an

ACKnowledge is not detected, the SMS8198 will terminate

further data transmissions and awaits a STOP condition

before returning to the standby power mode.

Device Addressing

Following a start condition the master must output the

address of the slave it is accessing. The most significant

four bits of the slave address are the device type identifier

Word Address

The next three bits of the slave address are an extension

of the array’s address and are concatenated with the eight

bits of address in the word address field, providing direct

access to the 2,048 X 8 array.

Read/Write Bit

The last bit of the data stream defines the operation to be

performed. When set to “1,” a read operation is selected;

when set to “0,” a write operation is selected.

1

0

1

0

A10

A9

A8

R/W

DEVICE

IDENTIFIER

HIGH ORDER

WORD ADDRESS

2036 ILL7.0