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STI5300 Datasheet(PDF) 2 Page - STMicroelectronics

Part No. STI5300
Description  High-performance set-top box decoder
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Maker  STMICROELECTRONICS [STMicroelectronics]
Homepage  http://www.st.com
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STI5300 Datasheet(HTML) 2 Page - STMicroelectronics

   
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STI5300
2/3
FEATURES
ST231 VLIW host CPU
– 333 MHz, 32 Kbyte ICache,
32 Kbyte DCache
– up to 1.333 GOPs at 333 MHz
– dynamic memory management through MMU
Unified memory interface
Package 27 mm x 27 mm PBGA336
– footprint optimized for 2 layer PCBs
Dual transport stream merger
– supports DVB and DIRECTV®
– integrated DES-ECB, DVB and ICAM
descramblers
– NDS RASP compliant
– low-cost DVB-CI and Cable Card support
MPEG-2 MP@ML video decoder
– trick modes including smooth fast forward
and rewind
Graphics/display
– 4 display planes
– 2, 4 and 8 bpp CLUT graphics, 256 x 30 bits
(AYCBCr) CLUT entries
– 16 bpp true color graphics,
– alpha blending, antialiasing, antiflutter,
antiflicker filters
PAL/NTSC/SECAM encoder
– RGB, CVBS, Y/C and YUV outputs with
10-bit DACs
– encoding of CGMS, Teletext, WSS, VPS,
close caption
Audio subsystem
– MPEG-1 layers I/II, MP3
– Dolby
® Digital decoding
– Dolby Pro Logic® compatible output
– PCM input, mixing and sample rate
conversion
– SRS/TruSurroundXT
® virtual surround sound
– simultaneous MPEG audio decode and
output of Dolby streams
On-chip peripherals
– 4 ASCs (UARTs) with Tx and Rx FIFOs
– 6 parallel 8-bit I/O banks
– 2 smartcard interfaces and clock generators
– 3 SSCs for I2C/SPI master/slave interfaces
– SiLabs line side (DAA) interface
– USB 1.1/2.0 host, OHCI/EHCI compliant
– DiSEqC 2.0
interface
Enhanced security
PART NUMBERING
Table 1. Order codes
REVISION HISTORY
Table 2. Revision history
Part Number
Description
STi5300ZUA
Development version
STi5300AUA
Basic DVB
STi5300-Mboard
Development platform
STi5300-DVB
Software reference tree
Date
Revision
Description of changes
September-2005
1
First issue


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