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S93463SB Datasheet(PDF) 2 Page - Summit Microelectronics, Inc. |
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S93463SB Datasheet(HTML) 2 Page - Summit Microelectronics, Inc. |
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2 / 14 page  2 S93462/S93463 2021 4.2 1/23/01 Summit Microelectronics, Inc. PIN FUNCTIONS Pin Name Function CS Chip Select SK Clock Input DI Serial Data Input DO Serial Data Output VCC +2.7 to 6.0V Power Supply GND Ground RESET/RESET# RESET I/O PIN CONFIGURATION DEVICE OPERATION APPLICATIONS The S93462/463 is ideal for applications requiring low voltage and low power consumption. This device pro- vides microcontroller RESET control and can be manu- ally resettable. RESET CONTROLLER DESCRIPTION The S93462/463 provides a precision reset controller that ensures correct system operation during brownout and power-up/-down conditions. It is configured with two open drain reset outputs; pin 7 is an active high output and pin 6 is an active low output. During power-up, the reset outputs remain active until VCC reaches the VTRIP threshold. The outputs will con- tinue to be driven for approximately 150ms after reach- ing VTRIP. The reset outputs will be valid so long as VCC is ≥ 1.0V. During power-down, the reset outputs will begin driving active when VCC falls below VTRIP. The reset pins are I/Os; therefore, the S93462/463 can act as a signal conditioning circuit for an externally applied reset. The inputs are edge triggered; that is, the RESET input will initiate a reset time-out after detecting a low to high transition and the RESET# input will initiate a reset time-out after detecting a high to low transition. Refer to the applications Information section for more details on device operation as a debounce/reset ex- tender circuit. It should be noted the reset outputs are open drain. When used as outputs driving a circuit they need to be either tied high (RESET#) or tied to ground (RESET) through the use of pull-up or pull-down resistors. Refer to the applications aid section for help in determining the value of resistor to be used. Internally these pins are weakly pulled up (RESET#) and pulled down (RESET): therefore, if the signals are not being used the pins may be left unconnected. GENERAL OPERATION The S93462/463 is a 1024-bit nonvolatile memory intended for use with industry standard microproces- sors. The S93463 is organized as X16, seven 9-bit instructions control the reading, writing and erase operations of the device. The S93462 is organized as X8, seven 10-bit instructions control the reading, writing and erase operations of the device. The device operates on a single 3V or 5V supply and will generate on chip, the high voltage required during any write operation. Instructions, addresses, and write data are clocked into the DI pin on the rising edge of the clock (SK). The DO pin is normally in a high impedance state except when reading data from the device, or when checking the ready/busy status after a write operation. The ready/busy status can be determined after the start of a write operation by selecting the device (CS high) and polling the DO pin; DO low indicates that the write operation is not completed, while DO high indicates that the device is ready for the next instruction. See the Applications Aid section for detailed use of the ready busy status. CS SK DI DO VCC RESET RESET# GND 1 2 3 4 8 7 6 5 8-Pin SOIC 2021 T PCon 2.0 |
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