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LNK362 Datasheet(PDF) 3 Page - Power Integrations, Inc.

Part No. LNK362
Description  Energy Effi cient, Low Power Off-Line Switcher IC
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Maker  POWERINT [Power Integrations, Inc.]
Homepage  http://www.powerint.com
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LNK362 Datasheet(HTML) 3 Page - Power Integrations, Inc.

 
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LNK362-364
C
12/05
3
05
10
Time (
µs)
0
100
200
400
500
600
300
V
DRAIN
136.5 kHz
127.5 kHz
LinkSwitch-XT Functional
Description
LinkSwitch-XT combines a high voltage power MOSFET
switch with a power supply controller in one device. Unlike
conventional PWM (pulse width modulator) controllers, a
simple ON/OFF control regulates the output voltage. The
controller consists of an oscillator, feedback (sense and logic)
circuit, 5.8 V regulator, BYPASS pin under-voltage circuit,
over-temperature protection, frequency jittering, current limit
circuit, and leading edge blanking integrated with a 700 V
power MOSFET. The LinkSwitch-XT incorporates additional
circuitry for auto-restart.
Oscillator
The typical oscillator frequency is internally set to an average
of 132 kHz. Two signals are generated from the oscillator: the
maximum duty cycle signal (DC
MAX) and the clock signal that
indicates the beginning of each cycle.
The oscillator incorporates circuitry that introduces a small
amount of frequency jitter, typically 9 kHz peak-to-peak,
to minimize EMI emission. The modulation rate of the
frequency jitter is set to 1.5 kHz to optimize EMI reduction
for both average and quasi-peak emissions. The frequency
jitter should be measured with the oscilloscope triggered at
the falling edge of the DRAIN waveform. The waveform in
Figure 4 illustrates the frequency jitter.
Feedback Input Circuit
The feedback input circuit at the FB pin consists of a low
impedance source follower output set at 1.65 V for LNK362
and 1.63 V for LNK363/364. When the current delivered into
this pin exceeds 49
µA, a low logic level (disable) is generated
at the output of the feedback circuit. This output is sampled
at the beginning of each cycle on the rising edge of the clock
signal. If high, the power MOSFET is turned on for that cycle
(enabled), otherwise the power MOSFETremains off (disabled).
Since the sampling is done only at the beginning of each cycle,
subsequent changes in the FB pin voltage or current during the
remainder of the cycle are ignored.
5.8 V Regulator and 6.3 V Shunt Voltage Clamp
The 5.8 V regulator charges the bypass capacitor connected to the
BYPASS pin to 5.8 V by drawing a current from the voltage on
the DRAIN, whenever the MOSFET is off. The BYPASS pin is
the internal supply voltage node. When the MOSFET is on, the
LinkSwitch-XTrunsoffoftheenergystoredinthebypasscapacitor.
Extremelylowpowerconsumptionoftheinternalcircuitryallows
the device to operate continuously from the current drawn from
the DRAIN pin. A bypass capacitor value of 0.1
µF is sufficient
for both high frequency decoupling and energy storage.
In addition, there is a 6.3 V shunt regulator clamping the
BYPASS pin at 6.3 V when current is provided to the BYPASS
pin through an external resistor. This facilitates powering of
the device externally through a bias winding to decrease the
no-load consumption to less than 50 mW.
BYPASS Pin Under-Voltage
The BYPASS pin under-voltage circuitry disables the power
MOSFET when the BYPASS pin voltage drops below 4.8 V.
Once the BYPASS pin voltage drops below 4.8 V, it must rise
back to 5.8 V to enable (turn-on) the power MOSFET.
Over-Temperature Protection
The thermal shutdown circuitry senses the die temperature.
The threshold is set at 142
°C typical with a 75 °C hysteresis.
When the die temperature rises above this threshold (142
°C)the
power MOSFET is disabled and remains disabled until the die
temperature falls by 75
°C, at which point it is re-enabled.
Current Limit
The current limit circuit senses the current in the power MOSFET.
When this current exceeds the internal threshold (I
LIMIT), the
power MOSFET is turned off for the remainder of that cycle.
The leading edge blanking circuit inhibits the current limit
comparator for a short time (t
LEB) after the power MOSFET
is turned on. This leading edge blanking time has been set so
that current spikes caused by capacitance and rectifier reverse
recovery time will not cause premature termination of the
switching pulse.
Auto-Restart
In the event of a fault condition such as output overload, output
short circuit, or an open loop condition, LinkSwitch-XT enters
into auto-restart operation. An internal counter clocked by the
oscillator gets reset every time the FB pin is pulled high. If the
FB pin is not pulled high for approximately 40 ms, the power
MOSFET switching is disabled for 800 ms. The auto-restart
alternately enables and disables the switching of the power
MOSFET until the fault condition is removed.
Figure 4. Frequency Jitter.


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