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CRCW08055492F Datasheet(PDF) 2 Page - National Semiconductor (TI)

[Old version datasheet] Texas Instruments acquired National semiconductor.
Part # CRCW08055492F
Description  Synchronous Buck Controller with Pre-bias Startup, and Optional Clock Synchronization
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Manufacturer  NSC [National Semiconductor (TI)]
Direct Link  http://www.national.com
Logo NSC - National Semiconductor (TI)

CRCW08055492F Datasheet(HTML) 2 Page - National Semiconductor (TI)

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Connection Diagram
20150990
14-Lead Plastic TSSOP
θ
JA = 155˚C/W
NS Package Number MTC14
Ordering Information
Order Number
Package Type
NSC Package Drawing
Supplied As
LM2747MTC
TSSOP-14
MTC14
94 Units on Rail
LM2747MTCX
2500 Units on Tape and Reel
Pin Description
BOOT (Pin 1) - Bootstrap pin. This is the supply rail for the
high-side gate driver. When the high-side MOSFET turns on,
the voltage on this pin should be at least one gate threshold
above the regulator input voltage V
IN to properly turn on the
MOSFET. See MOSFET Gate Drivers in the Application
Information section for more details on how to select MOS-
FETs.
LG (Pin 2) - Low-gate drive pin. This is the gate drive for the
low-side N-channel MOSFET. This signal is interlocked with
the high-side gate drive HG (Pin 14), so as to avoid shoot-
through.
PGND (Pins 3, 13) - Power ground. This is also the ground
for the low-side MOSFET driver. Both the pins must be
connected together on the PCB and form a ground plane,
which is usually also the system ground.
SGND (Pin 4) - Signal ground. It should be connected
appropriately to the ground plane with due regard to good
layout practices in switching power regulator circuits.
V
CC (Pin 5) Supply rail for the control sections of the IC.
PWGD (Pin 6) - Power Good pin. This is an open drain
output, which is typically meant to be connected to V
CC or
any other low voltage source through a pull-up resistor.
Choose the pull-up resistor so that the current going into this
pin is kept below 1 mA. A recommended value for the pull-up
resistor is 100 k
Ω for most applications. The voltage on this
pin is thus pulled low under output undervoltage or overvolt-
age fault conditions and also under input UVLO.
I
SEN (Pin 7) - Current limit threshold setting pin. This sources
a fixed 40 µA current. A resistor of appropriate value should
be connected between this pin and the drain of the low-side
MOSFET (switch node). The minimum value for this resistor
is1k
Ω.
EAO (Pin 8) - Output of the error amplifier. The voltage level
on this pin is compared with an internally generated ramp
signal to determine the duty cycle. This pin is necessary for
compensating the control loop.
SS/TRACK (Pin 9) - Soft-start and tracking pin. This pin is
internally connected to the non-inverting input of the error
amplifier during soft-start, and in fact any time the SS/
TRACK pin voltage happens to be below the internal refer-
ence voltage. For the basic soft-start function, a capacitor of
minimum value 1 nF is connected from this pin to ground. To
track the rising ramp of another power supply’s output, con-
nect a resistor divider from the output of that supply to this
pin as described in Application Information.
FB (Pin 10) - Feedback pin. This is the inverting input of the
error amplifier, which is used for sensing the output voltage
and compensating the control loop.
FREQ/SYNC (Pin 11) - Frequency adjust pin. The switching
frequency is set by connecting a resistor of suitable value
between this pin and ground. Some typical values (rounded
up to the nearest standard values) are 150 k
Ω for 200 kHz,
100 k
Ω for 300 kHz, 51.1 kΩ for 500 kHz, 18.7 kΩ for 1 MHz.
This pin is also used to synchronize to an external clock
within the range of 250kHz to 1MHz.
SD (Pin 12) - IC shutdown pin. Pull this pin to V
CC to ensure
the IC is enabled. Connect to ground to disable the IC. Under
shutdown, both high-side and low-side drives are off. This
pin also features a precision threshold for power supply
sequencing purposes, as well as a low threshold to ensure
minimal quiescent current.
HG (Pin 14) - High-gate drive pin. This is the gate drive for
the high-side N-channel MOSFET. This signal is interlocked
with LG (Pin 2) to avoid shoot-through.
www.national.com
2


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