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TMS28F004AZB60BDBJL Datasheet(PDF) 28 Page - Texas Instruments |
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TMS28F004AZB60BDBJL Datasheet(HTML) 28 Page - Texas Instruments |
28 / 80 page switching characteristics for TMS28F004ASy and TMS28F400ASy over recommended ranges of supply voltage (commercial and extended temperature ranges) read operations ALT ’28F004ASy60 ’28F400ASy 60 ’28F004ASy 70 ’28F400ASy 70 ’28F004ASy 80 ’28F400ASy 80 PARAMETER ALT. SYMBOL 3.3-V VCC RANGE 5-V VCC RANGE 3.3-V VCC RANGE 5-V VCC RANGE 3.3-V VCC RANGE 5-V VCC RANGE UNIT MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX MIN MAX ta(A) Access time from A0 – A17 (see Note 15) tAVQV 110 60 130 70 150 80 ns ta(E) Access time from E tELQV 110 60 130 70 150 80 ns ta(G) Access time from G tGLQV 65 35 80 40 90 40 ns tc(R) Cycle time, read tAVAV 110 60 130 70 150 80 ns td(E) Delay time, E low to low-impedance output tELQX 0 0 0 0 0 0 ns td(G) Delay time, G low to low-impedance output tGLQX 0 0 0 0 0 0 ns tdis(E) Disable time, E to high-impedance output tEHQZ 55 25 70 30 80 30 ns tdis(G) Disable time, G to high-impedance output tGHQZ 45 25 55 30 60 30 ns th(D) Hold time, DQ valid from A0 – A17, E, or G, whichever occurs first (see Note 15) tAXQX 0 0 0 0 0 0 ns tsu(EB) Setup time, BYTE from E low tELFL tELFH 5 5 5 5 5 5 ns td(RP) Output delay time from RP high tPHQV 800 450 800 450 800 450 ns tdis(BL) Disable time, BYTE low to DQ8 – DQ15 in high-impedance state tFLQZ 45 25 55 30 60 30 ns ta(BH) Access time from BYTE going high tFHQV 110 60 130 70 150 80 ns NOTE 15: A–1 – A17 for byte-wide |
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