ZL50050GAG2 datasheet(13/94 Pages) ZARLINK

Part #	ZL50050GAG2

Description	8 K-Channel Digital Switch with High Jitter Tolerance, Per Stream Rate Conversion (2, 4, 8, 16, or 32 Mbps), and 32 Inputs and 32 Outputs

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Manufacturer	ZARLINK [Zarlink Semiconductor Inc]

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13 / 94 page

ZL50050

Data Sheet

13

Zarlink Semiconductor Inc.

BSTo0-7

B3, A1, A2, C4,

C5, B2, D2, C2

Backplane Serial Output Streams 0 to 7 (5 V Tolerant, Three-state

Outputs with Slew-Rate Control).

In Backplane Non-32 Mbps Mode, these pins output serial TDM data streams

at a data rate of:

16.384 Mbps (with 256 channels per stream),

8.192 Mbps (with 128 channels per stream),

4.096 Mbps (with 64 channels per stream) or

2.048 Mbps (with 32 channels per stream).

The data rate is independently programmable for each output stream.

In Backplane 32 Mbps Mode, these pins output serial TDM data streams at a

fixed data rate of 32.768 Mbps (with 512 channels per stream).

Refer to the descriptions of the BORS and ODE pins for control of the output

HIGH or high impedance state.

BSTo8-15

C3, F1, D3, E2,

E1, E3, F2, F3

Backplane Serial Output Streams 8 to 15 (5 V Tolerant, Three-state

Outputs with Slew-Rate Control).

In Backplane Non-32 Mbps Mode, these pins output serial TDM data streams

at a data rate of:

16.384 Mbps (with 256 channels per stream),

8.192 Mbps (with 128 channels per stream),

4.096 Mbps (with 64 channels per stream) or

2.048 Mbps (with 32 channels per stream).

The data rate is independently programmable for each output stream.

These pins are unused when the Backplane 32 Mbps Mode is selected.

Therefore, the value output on these pins during Backplane 32 Mbps Mode

(either driven-HIGH or high impedance) is dependent on the configuration of

the BORS pin.

Refer to the descriptions of the BORS and ODE pins for control of the output

HIGH or high impedance state.

BCSTo0-1

A13, C10

Backplane Output Channel High-Impedance Control (5 V Tolerant,

Three-state Outputs). These pins control external buffering individually for a

set of Backplane output streams on a per-channel basis.

When LOW, the external output buffer will be tri-stated.

When HIGH, the external output buffer will be enabled.

In Backplane Non-32 Mbps Mode (stream rates 2 Mbps to 16 Mbps):

BCSTo0 is the output enable for BSTo0,2,4,6,8,10,12,14

BCSTo1 is the output enable for BSTo1,3,5,7,9,11,13,15

In Backplane 32 Mbps Mode (stream rate 32 Mbps):

BCSTo0 is the output enable for BSTo0,2,4,6

BCSTo1 is the output enable for BSTo1,3,5,7

Refer to the descriptions of the BORS and ODE pins for control of the output

LOW or active state.

Pin Description (continued)

Pin Name

ZL50050

Package

Coordinates

(196-ball

PBGA)

Description

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ZL50050GAG2 Datasheet(PDF) 13 Page - Zarlink Semiconductor Inc

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