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K6T1008U2C-TD10 Datasheet(PDF) 2 Page - Samsung semiconductor |
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K6T1008U2C-TD10 Datasheet(HTML) 2 Page - Samsung semiconductor |
2 / 11 page K6T1008V2C, K6T1008U2C Family CMOS SRAM Revision 2.0 November 1997 2 128K x8 bit Low Power and Low Voltage CMOS Static RAM GENERAL DESCRIPTION The K6T1008V2C and K6T1008U2C families are fabricated by SAMSUNG ′s advanced CMOS process technology. The fami- lies support various operating temperature ranges and have various package types for user flexibility of system design. The families also supports low data retention voltage for battery back-up operation with low data retention current. FEATURES • Process Technology: 0.4µm CMOS • Organization: 128K x8 • Power Supply Voltage: K6T1008V2C family: 3.0~3.6V K6T1008U2C family: 2.7~3.3V • Low Data Retention Voltage: 2V(Min) • Three state output and TTL Compatible • Package Type: 32-SOP-525, 32-TSOP1-0820F/R, 32-TSOP1-0813.4F/R Name Function CS1, CS2 Chip Select Inputs OE Output Enable Input WE Write Enable Input A0~A16 Address Inputs I/O1~I/O8 Data Inputs/Outputs Vcc Power Vss Ground N.C No Connection PRODUCT FAMILY Product Family Operating Temperature Vcc Range Speed Power Dissipation PKG Type Standby (ISB1, Max) Operating (ICC2, Max) K6T1008V2C-B Commercial(0~70 °C) 3.0~3.6V 70/100ns 10 µA 35mA 32-SOP 32-TSOP1-F/R 32-sTSOP1-F/R K6T1008U2C-B 2.7~3.3V 85/100ns K6T1008V2C-D Extended(-25~85 °C) 3.0~3.6V 70/100ns K6T1008U2C-D 2.7~3.3V 85/100ns K6T1008V2C-F Industrial(-40~85 °C) 3.0~3.6V 70/100ns K6T1008U2C-F 2.7~3.3V 85/100ns FUNCTIONAL BLOCK DIAGRAM PIN DESCRIPTION 32-TSOP Type1-Reverse A11 A9 A8 A13 WE CS2 A15 VCC NC A16 A14 A12 A7 A6 A5 A4 OE A10 CS1 I/O8 I/O7 I/O6 I/O5 I/O4 VSS I/O3 I/O2 I/O1 A0 A1 A2 A3 32-STSOP Type1-Forward 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 N.C A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 I/O1 I/O2 I/O3 VSS VCC A15 CS2 WE A13 A8 A9 A11 OE A10 CS1 I/O8 I/O7 I/O6 I/O5 I/O4 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32-SOP A11 A9 A8 WE A13 CS2 VCC A15 NC A16 A14 A12 A7 A6 A5 A4 OE A10 CS1 I/O8 I/O7 I/O6 I/O5 I/O4 VSS I/O3 I/O2 I/O1 A0 A1 A2 A3 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32-TSOP SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice. Precharge circuit. Memory array 1024 rows 128 ×8 columns I/O Circuit Column select Clk gen. Row select A10 A0 A1 A2 A3 A11 A9 I/O1 Data cont I/O8 VCC VSS A4 A5 A6 A7 A8 A12 A14 A13 A15 A16 CS1 WE OE Control logic CS2 32-STSOP |
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