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LMQ664X0 Datasheet(PDF) 16 Page - Texas Instruments |
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LMQ664X0 Datasheet(HTML) 16 Page - Texas Instruments |
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16 / 48 page  The power-good output scheme consists of an open-drain n-channel MOSFET, which requires an external pullup resistor connected to a suitable logic supply. It can also be pulled up to either VCC or VOUT through an appropriate resistor, as desired. If this function is not needed, the PG pin can be open or grounded. Limit the current into this pin to ≤ 4 mA. Input Voltage Input Voltage Output Voltage VPG-UV (falling) VPG-HYST VINMIN (rising) VPG_VAL GND VOUT VINMIN (falling) PG PG may not be valid if input is below VPG-VAL Startup delay tRESET_FILTER PG may not be valid if input is below VPG-VAL Small glitches do not reset tPG_ACT timer Small glitches do not cause reset to signal a fault tPG_ACT tRESET_FILTER tPG_ACT tRESET_FILTER tRESET_FILTER Figure 8-9. Power-Good Operation (OV Events Not Included) Table 8-3. Fault Conditions for PG (Pull Low) Fault Condition Initiated Fault Condition Ends (After Which tPG_ACT Must Pass Before PG Output Is Released) VOUT < VPG UV AND t > tRESET_FILTER Output voltage in regulation: VPG UV + VPGHYST < VOUT < VPGOV - VPGHYST VOUT > VPG OV AND t > tRESET_FILTER Output voltage in regulation TJ > TSD(trip) TJ < TSD(trip) - TSD(hyst) AND output voltage in regulation EN < VEN-VOUT – VEN-HYST EN > VEN-VOUT AND output voltage in regulation 8.3.5 Internal LDO, VCC, and VOUT/FB Input The device uses the internal LDO output and the VCC pin for all internal power supply. The VCC pin draws power either from the VIN (in adjustable output variants) or VOUT/FB (in fixed-output variants). In the fixed- output variants, once the device is active but has yet to regulate, the VCC rail continues to draw power from the input voltage, VIN, until the VOUT/FB voltage reaches > 3.15 V (or when the device has reached steady-state regulation post the soft start). The VCC rail typically measures 3.3 V in both adjustable and fixed output variants. During start-up, VCC momentarily exceeds the normal operating voltage and then drops to the normal operating voltage. 8.3.6 Bootstrap Voltage and VBOOT-UVLO (BOOT Terminal) The high-side switch driver circuit requires a bias voltage higher than VIN to make sure the HS switch is turned on. The internal 0.1-μF capacitor that is connected between BOOT and SW works as a charge pump to boost voltage on the BOOT terminal to (SW + VCC). The boot diode is integrated on the device die to minimize physical solution size. The CBOOT rail has a UVLO setting. This UVLO has a threshold of VBOOT-UVLO and is typically set at 2.1 V. If the BOOT capacitor is not charged above this voltage with respect to the SW pin, then the part initiates a charging sequence, turning on the low-side switch before attempting to turn on the high-side device. LMQ66430 SNVSC78 – FEBRUARY 2022 www.ti.com 16 Submit Document Feedback Copyright © 2022 Texas Instruments Incorporated Product Folder Links: LMQ66430 |
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