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AK7750 Datasheet(PDF) 1 Page - Asahi Kasei Microsystems |
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AK7750 Datasheet(HTML) 1 Page - Asahi Kasei Microsystems |
1 / 77 page ![]() [ASAHI KASEI] [AK7750] [MS0296-E-00] 1 2005/03 General Description The AK7750 is a highly integrated Audio Digital Signal Processor with a stereo audio codec in one chip. The AK7750 combines an on-chip DSP and an ARM7 processor that can be used to create Echo Cancellation (EC) and Noise Cancellation (NC) functions. These functions make the AK7750 a perfect choice for hands-free phones that require suppressing acoustic echo and noise. Voice quality and noise suppression levels can be precisely adjusted by externally setting various parameters. Additionally, no external Flash, ROM, or RAM is required as memories for Echo and Noise Cancellation are integrated on- chip. By using an external microprocessor to change algorithms, the AK7750 can be used in other audio applications including sound field enhancements like surround, volume control, parametric equalizer and speaker compensation. These functions are simplified by the AK7750 through the integration of 64K bit delay data RAM, a high-performance audio Codec with sample rates from 8 KHz ~ 48 KHz, and 8- channels of Digital Audio input / output. What’s more, the latest Surround Decoders can be also be implemented by using the certified algorithms from various technology partners. Features [DSP Block] Data Word Length: 24 bit Machine Cycle: 27.1 ns (fastest) (768fs at 48 KHz) Number of Steps: 768 steps max. at fs = 48 KHz 4608 steps max. at fs = 8 KHz 192 steps max. at fs = 192 KHz Multiply: 24 x 16 -> 40 bit (enables double precision operation) Division: 24 / 24 -> 24 bit or 16 bit ALU: 34 bit arithmetic operation (overflow margin 4 bits) 24 bit arithmetic & logic operations Shift: 1,2,3,4,6,8,15 Bit Left Shift with indirect shift function 1,2,3,4,8,14,15 bit Right Shift with indirect shift function Program RAM (PRAM): 768 words x 32 bit Coefficient RAM (CRAM): 1024 words x 16 bit Data RAM (DRAM): 256 words x 24 bit Offset RAM (OFRAM): 48 words x 12 bit Delay RAM (DLRAM): 64K bits (following 3 types are selectable): - 1K words 24 bit - 1K words 24 bit & 2K words 16 bit (limited pointer capability) - 4kword 16bit Data Compression/Expansion circuits for 16 bit data handling are integrated on-chip (Dynamic-range: 23 bit equivalent, S/N+D: 15 bit equivalent (FS)). - In Hands-free mode, Delay RAM cannot be used. Registers: 34 bits x 4 (ACC) [for ALU] 24 bit x 8 (TMP) [for DBUS Interface] 24 bit x 6 stage stacks (PTMP) [for DBUS Interface] On-chip ARM7TDMI Processor: Audio DSP with Built-in Hands-Free Phone Features AK7750 |