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AK7746 Datasheet(PDF) 8 Page - Asahi Kasei Microsystems |
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AK7746 Datasheet(HTML) 8 Page - Asahi Kasei Microsystems |
8 / 62 page [ASAHI KASEI] [AK7746] [MS0369-E00] - 8 - 2004/12 Pin No Pin name I/O Function Classification 46 AVDD - Analog Power supply pin 3.3V (typ) 47 AVSS - Analog Ground 0.0V Analog Power Supply 48 LFLT O Filter connection pin for PLL When using the PLL function, connect a 22k Ω resistor and a 1.5nF capacitor in series to the analog ground (AVSS) Analog output 49 AINM I ADCM Monaural single ended input 50 AINR4 I ADC1 or ADC2 Rch single ended input 4 51 AINL4 I ADC1 or ADC2 Lch single ended input 4 52 AINR3 I ADC1 or ADC2 Rch single ended input 3 53 AINL3 I ADC1 or ADC2 Lch single ended input 3 54 AINR2 I ADC1 or ADC2 Rch single ended input pin 2 55 AINL2 I ADC1 or ADC2 Lch single ended input pin 2 Analog input 56 AVDD - Analog Power Supply 3.3V (typ) Analog Power supply 57 VREFH I Analog reference voltage input Normally, connect to AVDD, and connect 0.1 µF and 10µF capacitors between this pin and AVSS. Analog input 58 VCOM O Common voltage Normally, connect 10 µF and 0.1µFcapacitor between this pin and AVSS. Don’t connect to other circuitry. Analog output 59 VREFL I Analog reference voltage input pin for low-level. Normally, connect to AVSS. Analog input 60 AVSS - Analog Ground 0.0V Analog Power Supply 61 AINR- I ADC1 or ADC2 Rch analog inverted input 62 AINR+ I ADC1 or ADC2 Rch analog non-inverted input 63 AINL- I ADC1 or ADC2 Lch analog inverted input 64 AINL+ I ADC1 or ADC2 Lch analog non-inverted Analog input Note) Do NOT leave open digital input pins unless they are internally pulled down and BITCLK_I, LRCLK_I in master mode. (If you do not use pull-down pin, leave open or connects to DVSS. However, TESTI pin should connect to DVSS. ) * If analog input pins (1~8, 49~55, 61~64 pin ) are not used, leave them open. |
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