LMX2332LTMX datasheet(12/23 Pages) NSC | PLLatinumTM Low Power Dual Frequency Synthesizer for RF Personal Communications

Part #	LMX2332LTMX

Description	PLLatinumTM Low Power Dual Frequency Synthesizer for RF Personal Communications

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Manufacturer	NSC [National Semiconductor (TI)]

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Typical Performance Characteristics (Continued)

LMX2332L RF Sensitivity vs Frequency

IF Input Sensitivity vs Frequency

01280631

01280632

Oscillator Input Sensitivity vs Frequency

01280633

Functional Description

The simplified block diagram below shows the 22-bit data register, two 15-bit R Counters and the 15- and 18-bit N Counters

(intermediate latches are not shown). The data stream is clocked (on the rising edge of Clock) into the DATA register, MSB first.

The data stored in the shift register is loaded into one of 4 appropriate latches on the rising edge of LE. The last two bits are the

Control Bits. The DATA is transferred into the counters as follows:

Control Bits

DATA Location

C1

C2

0

IF R Counter

0

1

RF R Counter

1

0

IF N Counter

1

RF N Counter

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