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PDU10256H Datasheet(PDF) 5 Page - Data Delay Devices, Inc.

Part No. PDU10256H
Description  8-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU10256H)
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Maker  DATADELAY [Data Delay Devices, Inc.]
Homepage  http://www.datadelay.com
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PDU10256H Datasheet(HTML) 5 Page - Data Delay Devices, Inc.

   
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PDU10256H
Doc #97047
DATA DELAY DEVICES, INC.
5
12/17/97
3 Mt. Prospect Ave. Clifton, NJ 07013
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
OUTPUT:
Ambient Temperature: 25
oC
± 3oC
Load:
50
Ω to -2V
Supply Voltage (Vcc): -5.0V
± 0.1V
Cload:
5pf
± 10%
Input Pulse:
Standard 10KH ECL
Threshold:
(VOH + VOL) / 2
levels
(Rising & Falling)
Source Impedance:
50
Ω Max.
Rise/Fall Time:
2.0 ns Max. (measured
between 20% and 80%)
Pulse Width:
PWIN = 1.5 x Total Delay
Period:
PERIN = 10 x Total Delay
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
OUT
OUT
TRIG
IN
REF
TRIG
Test Setup
DEVICE UNDER
TEST (DUT)
OSCILLOSCOPE
PULSE
GENERATOR
IN
ADDRESS SELECT
Timing Diagram For Testing
TRISE
TFALL
PERIN
PWIN
TRISE
TFALL
20%
20%
50%
50%
80%
80%
50%
50%
VIH
VIL
VOH
VOL
INPUT
SIGNAL
OUTPUT
SIGNAL


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