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PDU53 Datasheet(PDF) 4 Page - Data Delay Devices, Inc.

Part No. PDU53
Description  3-BIT, ECL-INTERFACED PROGRAMMABLE DELAY LINE (SERIES PDU53)
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Maker  DATADELAY [Data Delay Devices, Inc.]
Homepage  http://www.datadelay.com
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PDU53 Datasheet(HTML) 4 Page - Data Delay Devices, Inc.

   
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PDU53
DELAY LINE AUTOMATED TESTING
TEST CONDITIONS
INPUT:
OUTPUT:
Ambient Temperature: 25
oC ± 3oC
Load:
50
Ω to -2V
Supply Voltage (Vcc): -4.5V
± 0.1V
Cload:
5pf
± 10%
Input Pulse:
Standard 100K ECL
Threshold:
(VOH + VOL) / 2
levels
(Rising & Falling)
Source Impedance:
50
Ω Max.
Rise/Fall Time:
1.0 ns Max. (measured
between 20% and 80%)
Pulse Width:
PWIN = 10ns
Period:
PERIN = 100ns
NOTE: The above conditions are for test only and do not in any way restrict the operation of the device.
OUT
OUT
TRIG
IN
REF
TRIG
Test Setup
DEVICE UNDER
TEST (DUT)
OSCILLOSCOPE
PULSE
GENERATOR
IN
ADDRESS SELECT
Timing Diagram For Testing
TRISE
TFALL
PERIN
PWIN
TRISE
TFALL
20%
20%
50%
50%
80%
80%
50%
50%
VIH
VIL
VOH
VOL
INPUT
SIGNAL
OUTPUT
SIGNAL
Doc #98003
DATA DELAY DEVICES, INC.
4
3/18/98
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com


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