XC651A4 datasheet(8/12 Pages) TOREX

Part #	XC651A4

Description	CMOS Low Power Consumption

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Manufacturer	TOREX [Torex Semiconductor]

Direct Link	http://www.torex.co.jp

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XC651A Series

676

10

2. MWVD (Positive Logic)

Ta=25

OC

PARAMETER

SYMBOL

CONDITIONS

MIN

TYP

MAX

UNITS

CIRCUIT

MW OUT 1 Detect Voltage

VDFMW1

1.250 1.275 1.301

V

5

MW OUT 2 Detect Voltage

VDFMW2

1.220 1.245 1.270

V

5

MW OUT 3 Detect Voltage

VDFMW3

1.186 1.210 1.234

V

5

MW OUT 4 Detect Voltage

VDFMW4

1.039 1.060 1.081

V

5

MW OUT 1 Hysteresis Width

VHYSMW1

(Release Voltage=VDFMW1 + VHYSMW1)

4

10

-

mV

5

MW OUT 2 Hysteresis Width

VHYSMW2

(Release Voltage=VDFMW2 + VHYSMW2)

410

-

mV

5

MW OUT 3 Hysteresis Width

VHYSMW3

(Release Voltage=VDFMW3 + VHYSMW3)

410

-

mV

5

MW OUT 4 Hysteresis Width

VHYSMW4

(Release Voltage=VDFMW4 x (1 + VHYSMW4 / 100) )

2

-

8

%

5

Supply Current

ISSMW

MWVD IN =2.0V

-

5.0

20.0

µA

6

Operating Voltage

MWVDIN

0.9

-

6.0

V

-

MW OUT 1 Output Current

IOUTMW1

Nch VDS=0.5V, MWVDIN =0.9V

0.18

1.8

-

mA

7

MW OUT 2 Output Current

IOUTMW2

Nch VDS=0.5V, MWVDIN =0.9V

0.18

1.8

-

mA

7

MW OUT 3 Output Current

IOUTMW3

Nch VDS=0.5V, MWVDIN =0.9V

0.18

1.8

-

mA

7

MW OUT 4 Output Current

IOUTMW4

Nch VDS=0.5V, MWVDIN =0.9V

0.18

1.8

-

mA

7

MW OUT 1 Delay Time

TDLYMW1

Release Voltage

Output Inversion, RIP open

-

0.4

msec

8

MW OUT 2 Delay Time

TDLYMW2

Release Voltage

Output Inversion, RIP open

-

0.4

msec

8

MW OUT 3 Delay Time

TDLYMW3

Release Voltage

Output Inversion, RIP open

-

0.4

msec

8

MW OUT 4 Delay Time

TDLYMW4

Release Voltage

Output Inversion, RIP open

-

0.4

msec

8

Ripple Rejection Resistance

RRIP

RIP=1V, MWVD IN =0V

250

500

1000

k

Ω

9

Special Parameter : VDFMW1

≥ VDFMW2 ≥ VDFMW3

10S_02XC651A 02.09.12 15:38 ページ 676

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