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3D7110 Datasheet(PDF) 4 Page - Data Delay Devices, Inc.

Part No. 3D7110
Description  MONOLITHIC 10-TAP FIXED DELAY LINE (SERIES 3D7110)
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Manufacturer  DATADELAY [Data Delay Devices, Inc.]
Direct Link  http://www.datadelay.com
Logo DATADELAY - Data Delay Devices, Inc.

3D7110 Datasheet(HTML) 4 Page - Data Delay Devices, Inc.

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3D7110
APPLICATION NOTES (CONT’D)
custom reference designator identifying the
intended frequency and duty cycle of operation.
The programmed delay accuracy of the device is
guaranteed, therefore, only for the user specified
input characteristics. Small input pulse width
variation about the selected pulse width will only
marginally impact the programmed delay
accuracy, if at all. Nevertheless, it is strongly
recommended that the engineering staff at
DATA DELAY DEVICES be consulted.
POWER SUPPLY AND
TEMPERATURE CONSIDERATIONS
The delay of CMOS integrated circuits is strongly
dependent on power supply and temperature.
The monolithic 3D7110 programmable delay line
utilizes novel and innovative compensation
circuitry to minimize the delay variations induced
by fluctuations in power supply and/or
temperature.
The thermal coefficient is reduced to 600
PPM/C, which is equivalent to a variation , over
the 0C-70C operating range, of
±3% from the
room-temperature delay settings and/or 1.0ns,
whichever is greater. The power supply
coefficient is reduced, over the 4.75V-5.25V
operating range, to
±1% of the delay settings at
the nominal 5.0VDC power supply and/or 1.5ns,
whichever is greater. It is essential that the
power supply pin be adequately bypassed
and filtered. In addition, the power bus
should be of as low an impedance
construction as possible. Power planes are
preferred.
DEVICE SPECIFICATIONS
TABLE 2: ABSOLUTE MAXIMUM RATINGS
PARAMETER
SYMBOL
MIN
MAX
UNITS
NOTES
DC Supply Voltage
VDD
-0.3
7.0
V
Input Pin Voltage
VIN
-0.3
VDD+0.3
V
Input Pin Current
IIN
-1.0
1.0
mA
25C
Storage Temperature
TSTRG
-55
150
C
Lead Temperature
TLEAD
300
C
10 sec
TABLE 3: DC ELECTRICAL CHARACTERISTICS
(0C to 70C, 4.75V to 5.25V)
PARAMETER
SYMBOL
MIN
MAX
UNITS
NOTES
Static Supply Current*
IDD
30
mA
High Level Input Voltage
VIH
2.0
V
Low Level Input Voltage
VIL
0.8
V
High Level Input Current
IIH
1
µA
VIH = VDD
Low Level Input Current
IIL
1
µA
VIL = 0V
High Level Output Current
IOH
-4.0
mA
VDD = 4.75V
VOH = 2.4V
Low Level Output Current
IOL
4.0
mA
VDD = 4.75V
VOL = 0.4V
Output Rise & Fall Time
TR & TF
2
ns
CLD = 5 pf
*IDD(Dynamic) = 10 * CLD * VDD * F
Input Capacitance = 10 pf typical
where: CLD = Average capacitance load/tap (pf)
Output Load Capacitance (CLD) = 25 pf max
F = Input frequency (GHz)
Doc #96005
DATA DELAY DEVICES, INC.
4
12/2/96
Tel: 973-773-2299
Fax: 973-773-9672
http://www.datadelay.com


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