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3D3314 Datasheet(PDF) 4 Page - Data Delay Devices, Inc. |
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3D3314 Datasheet(HTML) 4 Page - Data Delay Devices, Inc. |
4 / 5 page 3D3314 APPLICATION NOTES (CONT’D) The programmed delay accuracy of the device is guaranteed, therefore, only for the user specified input characteristics. Small input pulse width variation about the selected pulse width will only marginally impact the programmed delay accuracy, if at all. Nevertheless, it is strongly recommended that the engineering staff at DATA DELAY DEVICES be consulted. POWER SUPPLY AND TEMPERATURE CONSIDERATIONS The delay of CMOS integrated circuits is strongly dependent on power supply and temperature. The monolithic 3D3314 delay line utilizes novel and innovative compensation circuitry to minimize the delay variations induced by fluctuations in power supply and/or temperature. The thermal coefficient is reduced to 200 PPM/C, which is equivalent to a variation, over the 0C- 70C operating range, of ±1% or 0.25ns (whichever is greater) from the 25C delay settings. The power supply coefficient is reduced, over the 3.0V-3.6V operating range, to ±1% or 1ns (whichever is greater) of the delay settings at the nominal 3.3VDC power supply. It is essential that the power supply pin be adequately bypassed and filtered. In addition, the power bus should be of as low an impedance construction as possible. Power planes are preferred. . DEVICE SPECIFICATIONS TABLE 2: ABSOLUTE MAXIMUM RATINGS PARAMETER SYMBOL MIN MAX UNITS NOTES DC Supply Voltage VDD -0.3 7.0 V Input Pin Voltage VIN -0.3 VDD+0.3 V Input Pin Current IIN -1.0 1.0 mA 25C Storage Temperature TSTRG -55 150 C Lead Temperature TLEAD 300 C 10 sec TABLE 3: DC ELECTRICAL CHARACTERISTICS (0C to 70C, 3.0V to 3.6V) PARAMETER SYMBOL MIN TYP MAX UNITS NOTES Static Supply Current* IDD 1.3 2.0 mA VDD = 3.6V High Level Input Voltage VIH 2.0 V Low Level Input Voltage VIL 0.8 V High Level Input Current IIH -0.1 0.0 0.1 µA VIH = VDD Low Level Input Current IIL -0.1 0.0 0.1 µA VIL = 0V High Level Output Current IOH -8.0 -6.0 mA VDD = 3.0V VOH = 2.4V Low Level Output Current IOL 6.0 7.5 mA VDD = 3.0V VOL = 0.4V Output Rise & Fall Time TR & TF 2 ns CLD = 5 pf *IDD(Dynamic) = 4 * CLD * VDD * F Input Capacitance = 10 pf typical where: CLD = Average capacitance load/line (pf) Output Load Capacitance (CLD) = 25 pf max F = Input frequency (GHz) Doc #00120 DATA DELAY DEVICES, INC. 4 6/12/02 Tel: 973-773-2299 Fax: 973-773-9672 http://www.datadelay.com |
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