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3D3225 Datasheet(PDF) 1 Page - Data Delay Devices, Inc.

Part No. 3D3225
Description  MONOLITHIC 5-TAP FIXED DELAY LINE (SERIES 3D3225)
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Maker  DATADELAY [Data Delay Devices, Inc.]
Homepage  http://www.datadelay.com
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3D3225 Datasheet(HTML) 1 Page - Data Delay Devices, Inc.

   
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3D3225
MONOLITHIC 5-TAP
FIXED DELAY LINE
(SERIES 3D3225)
FEATURES
All-silicon, low-power CMOS technology
TTL/CMOS compatible inputs and outputs
Vapor phase, IR and wave solderable
Auto-insertable (DIP pkg.)
Low ground bounce noise
Leading- and trailing-edge accuracy
Delay range: 0.75ns through 3500ns
Delay tolerance: 2% or 0.5ns
Temperature stability:
±2% typical (-40C to 85C)
PACKAGES
14
13
12
11
10
9
8
1
2
3
4
5
6
7
IN
NC
NC
O2
NC
O4
GND
VDD
NC
O1
NC
O3
NC
O5
3D3225-xx
DIP-14
3D3225G-xx
Gull-Wing
3D3225K-xx
Unused pins
remo
1
2
3
4
5
6
7
8
ved
16
15
14
13
12
11
10
9
IN
NC
NC
O2
NC
O4
NC
GND
VDD
NC
NC
O1
NC
O3
NC
O5
3D3225S-xx SOL-16
1
2
3
4
8
7
6
5
IN
O2
O4
GND
VDD
O1
O3
O5
3D3225Z-xx SOIC-8
3D3225M-xx DIP-8
3D3225H-xx Gull-Wing
For mechanical dimensions, click
here.
For package marking details, click
here.
Vdd stability:
±1% typical (3.0V-3.6V)
Minimum input pulse width: 30% of total delay
8-pin Gull-Wing available as drop-in
replacement for hybrid delay lines
FUNCTIONAL DESCRIPTION
The 3D3225 5-Tap Delay Line product family consists of fixed-delay
CMOS integrated circuits. Each package contains a single delay line,
tapped and buffered at 5 points spaced uniformly in time. Tap-to-tap
(incremental) delay values can range from 0.75ns through 700ns. The
input is reproduced at the outputs without inversion, shifted in time as
per the user-specified dash number. The 3D3225 is TTL- and CMOS-
compatible, capable of driving ten 74LS-type loads, and features both
rising- and falling-edge accuracy.
The all-CMOS 3D3225 integrated circuit has been designed as a reliable, economic alternative to hybrid
TTL fixed delay lines. It is offered in a standard 8-pin auto-insertable DIP and space saving surface mount
8-pin SOIC and 16-pin SOL packages.
PIN DESCRIPTIONS
IN
Delay Line Input
O1
Tap 1 Output (20%)
O2
Tap 2 Output (40%)
O3
Tap 3 Output (60%)
O4
Tap 4 Output (80%)
O5
Tap 5 Output (100%)
VDD +3.3 Volts
GND Ground
TABLE 1: PART NUMBER SPECIFICATIONS
TOLERANCES
INPUT RESTRICTIONS
DASH
NUMBER
TOTAL
DELAY (ns)
TAP-TAP
DELAY (ns)
Rec’d Max
Frequency
Absolute Max
Frequency
Rec’d Min
Pulse Width
Absolute Min
Pulse Width
-.75
3.0
± 0.5*
0.75
± 0.4
41.7 MHz
166.7 MHz
12.0 ns
3.00 ns
-1
4.0
± 0.5*
1.0
± 0.5
37.0 MHz
166.7 MHz
13.5 ns
3.00 ns
-1.5
6.0
± 0.5*
1.5
± 0.7
31.2 MHz
166.7 MHz
16.0 ns
3.00 ns
-2
8.0
± 0.5*
2.0
± 0.8
25.0 MHz
166.7 MHz
20.0 ns
3.00 ns
-2.5
10.0
± 0.5*
2.5
± 1.0
22.2 MHz
125.0 MHz
22.5 ns
4.00 ns
-4
16.0
± 0.7*
4.0
± 1.3
8.33 MHz
133.3 MHz
30.0 ns
6.00 ns
-5
25.0
± 1.0
5.0
± 1.5
13.3 MHz
66.7 MHz
37.5 ns
7.50 ns
-10
50.0
± 1.0
10.0
± 2.0
6.67 MHz
33.3 MHz
75.0 ns
15.0 ns
-20
100.0
± 2.0
20.0
± 4.0
3.33 MHz
16.7 MHz
150 ns
30.0 ns
-50
250.0
± 5.0
50.0
± 10
1.33 MHz
6.67 MHz
375 ns
75.0 ns
-100
500.0
± 10
100
± 20
0.67 MHz
3.33 MHz
750 ns
150 ns
-200
1000
± 20
200
± 40
0.33 MHz
1.67 MHz
1500 ns
300 ns
-700
3500
± 70
700
± 140
0.10 MHz
0.48 MHz
5250 ns
1050 ns
* Total delay referenced to Tap1 output; Input-to-Tap1 = 7.5ns
± 1.0ns
NOTE:
Any dash number between .75 and 700 not shown is also available as standard.
2005 Data Delay Devices
Doc #05003
DATA DELAY DEVICES, INC.
1
12/22/05
3 Mt. Prospect Ave. Clifton, NJ 07013


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