SSD1820A/21
10
REV 1.4
01/03
SOLOMON
RES
This pin is reset signal input. When the pin is low, initialization of
the chip is executed.
PS0
This pin use together with PS1 to determine the interface proto-
col between the driver and MCU. Refer to PS1 pin descriptions for
more details.
PS1
This pin use together with PS0 to determine the interface proto-
col between the driver and MCU according to the following table.
CS
This pin is chip select input. The chip is enabled for display data/
command transfer only when CS is low.
D/C
This input pin is to identify display data/command cycle. When
the pin is high, the data written to the driver will be written into dis-
play RAM. When the pin is low, the data will be interpret as com-
mand. This pin must be connected to VSS when 3-lines SPI
interface is used.
R/W(WR)
This pin is microprocessor interface signal. When interfacing to
an 6800-series microprocessor, the signal indicates read mode
when high and write mode when low. When interfacing to an 8080-
microprocessor, a data write operation is initiated when R/W(WR)
is low and the chip is selected.
E(RD)
This pin is microprocessor interface signal. When interfacing to
an 6800-series microprocessor, a data operation is initiated when
E(RD) is high and the chip is selected. When interfacing to an
8080-microprocessor, a data read operation is initiated when
E(RD) is low and the chip is selected.
D0-D7
These pins are 8-bit bi-directional data bus to be connected to
the microprocessor’s data bus. When serial mode is selected, D7 is
the serial data input SDA and D6 is the serial clock input SCK.
INTRS
This pin is an input pin to enable the internal resistors network for
the voltage regulator when INTRS is high. When it is low, the exter-
nal resistors R1/R2 should be connected to VL6, VR and VSS.
PS0
PS1
Interface
L
L
3-wire SPI (write only)
L
H
4-wire SPI (write only)
H
L
8080 parallel interface (read and write allowed)
H
H
6800 parallel interface (read and write allowed)
REF
This pin is an input pin to enable the internal reference voltage
used for the internal regulator. When it is high, an internal refer-
ence voltage source will be used. When it is low, an external refer-
ence voltage source must be provided in VEXT pin if internal
regulator is used.
VDD
Power supply pin.
VSS
Ground.
VCI
Reference voltage input for internal DC-DC converter. The volt-
age of generated VCC equals to the multiple factor (2X, 3X, 4X, 5X
or 6X) times VCI with respect to VSS.
Note:
1.) voltage at this input pin must be larger than or equal to VDD.
2.) 6X is avaliable for SSD1821 only.
VCC
This is the most positive voltage supply pin of the chip. It can be
supplied externally or generated by the internal DC-DC converter.
When using internal DC-DC converter as generator, voltage at
this pin is for internal reference only. It CANNOT be used for driv-
ing external circuitries.
C1P, C2P, C3P, C4P, C5P, C1N and C2N
When internal DC-DC voltage converter is used, external
capacitor(s) is/are connected among these pins.
VL6
This pin is the most positive LCD driving voltage. It can be sup-
plied externally or generated by the internal regulator.
VR
This pin is an input of the internal voltage regulator. When the
internal resistors network for the voltage regulator is disabled
(INTRS is pulled low), external resistors should be connected
between VSS and VR, and VR and VL6, respectively (see applica-
tion circuit).
VEXT
This pin is an input to provide an external voltage reference for
the internal voltage regulator when REF pin is pulled low.
PIN DESCRIPTIONS
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