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OPA388-Q1 Datasheet(PDF) 22 Page - Texas Instruments

Part # OPA388-Q1
Description  OPAx388-Q1 Automotive, Precision, Zero-Drift, Zero-Crossover, True Rail-to-Rail, Input/Output Operational Amplifiers
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

OPA388-Q1 Datasheet(HTML) 22 Page - Texas Instruments

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9 Power Supply Recommendations
The OPAx388-Q1 family of operational amplifiers can be used with single or dual supplies from an operating
range of VS = 2.5 V (±1.25 V) up to 5.5 V (±2.75 V). Key parameters that vary over the supply voltage or
temperature range are shown in Section 6.7.
CAUTION
Supply voltages greater than 7 V can permanently damage the device (see Section 6.1).
10 Layout
10.1 Layout Guidelines
Pay attention to good layout practice. Keep traces short and, if possible, use a printed-circuit board (PCB)
ground plane with surface-mount components placed as close as possible to the device pins. Place a 0.1-µF
capacitor closely across the supply pins. Apply these guidelines throughout the analog circuit to improve
performance and provide benefits, such as reducing the electromagnetic interference (EMI) susceptibility.
For lowest offset voltage and precision performance, optimize the circuit layout and mechanical conditions. Avoid
temperature gradients that create thermoelectric (Seebeck) effects in the thermocouple junctions formed from
connecting dissimilar conductors. These thermally-generated potentials can be made to cancel by making sure
these potentials are equal on both input terminals. Other layout and design considerations include:
• Use low thermoelectric-coefficient conditions (avoid dissimilar metals).
• Thermally isolate components from power supplies or other heat sources.
• Shield operational amplifier and input circuitry from air currents, such as cooling fans.
Follow these guidelines to reduce the likelihood of junctions being at different temperatures, which can cause
thermoelectric voltage drift of 0.1 µV/°C or greater, depending on the materials used.
10.2 Layout Example
+
VIN
VOUT
RG
RF
Figure 10-1. Schematic Representation
N/C
±IN
+IN
V+
OUTPUT
N/C
N/C
VS+
GND
Ground (GND) plane on another layer
VOUT
VIN
GND
Run the input traces
as far away from
the supply lines
as possible
RF
RG
Place components close
to device and to each
other to reduce parasitic
errors
Use low-ESR,
ceramic bypass
capacitors
GND
Figure 10-2. Layout Example
OPA388-Q1, OPA2388-Q1
SBOS989A – AUGUST 2020 – REVISED NOVEMBER 2021
www.ti.com
22
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Copyright © 2021 Texas Instruments Incorporated
Product Folder Links: OPA388-Q1 OPA2388-Q1


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