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PEEL22CV10AP-7 Datasheet(PDF) 4 Page - Anachip Corp

Part No. PEEL22CV10AP-7
Description  PEEL™ 22CV10A-7/-10/-15/-25 CMOS Programmable Electrically Erasable Logic Device
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Maker  ANACHIP [Anachip Corp]
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PEEL22CV10AP-7 Datasheet(HTML) 4 Page - Anachip Corp

 
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04-02-010F
enable term will permanently enable the output buffer and
yield a dedicated output. Conversely, if every connection is
intact, the enable term will always be logically false and the
I/O will function as a dedicated input.
Input/Feedback Select
When configuring an I/O macrocell to implement a regis-
tered function (configurations 1 and 2 in Figure 5), the Q
output of the flip-flop drives the feedback term. When con-
figuring an I/O macrocell to implement a combinatorial
function (configurations 3 and 4 in Figure 5), the feedback
signal is taken from the I/O pin. In this case, the pin can be
used as a dedicated input or a bi-directional I/O. (Refer
also to Table 1.)
Additional Macro Cell Configurations
Besides the standard four-configuration macrocell shown in
Figure 5, each PEEL™22CV10A provides an additional
eight configurations that can be used to increase design
flexibility. The configurations are the same as provided by
the PEEL™18CV8 and PEEL™22CV10AZ. However, to
maintain JEDEC file compatibility with standard 22V10
PLDs the additional configurations can only be utilized by
specifying the PEEL™22CV10A+ and PEEL22CV10A++
for logic assembly and programming. To reference these
additional configurations please refer to the specifications
at the end of this data sheet.
Design Security
The PEEL™22CV10A provides a special EEPROM secu-
rity bit that prevents unauthorized reading or copying of
designs programmed into the device. The security bit is set
by the PLD programmer, either at the conclusion of the pro-
gramming cycle or as a separate step after the device has
been programmed. Once the security bit is set, it is impos-
sible to verify (read) or program the PEEL™ until the entire
device has first been erased with the bulk-erase function.
Signature Word
The signature word feature allows a 24-bit code to be pro-
grammed
into
the
PEEL™22CV10A
if
the
PEEL™22CV10A+ software option is used. Also, the sig-
nature word feature allows a 64-bit code to be programmed
into the PEEL™22CV10A if the PEEL™22CV10A++ soft-
ware option is used. The code can be read back even after
the security bit has been set. The signature word can be
used to identify the pattern programmed into the device or
to record the design revision, etc.
Figure 4. Block Diagram of the PEEL™ 22CV10A I/O Macrocell.


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