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NE1617A Datasheet(PDF) 5 Page - NXP Semiconductors

Part No. NE1617A
Description  Temperature monitor for microprocessor systems
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Maker  PHILIPS [NXP Semiconductors]
Homepage  http://www.nxp.com
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NE1617A Datasheet(HTML) 5 Page - NXP Semiconductors

 
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Philips Semiconductors
Product data sheet
NE1617A
Temperature monitor for microprocessor systems
2004 Oct 05
5
ELECTRICAL CHARACTERISTICS
VDD = 3.0 V to 3.6 V; Tamb = 0 °C to +125 °C, unless otherwise noted.
PARAMETER
CONDITIONS
LIMITS
UNIT
PARAMETER
CONDITIONS
MIN.
TYP.
MAX.
UNIT
Temperature resolution
1
°C
Local temperature error
Tamb = +60 °C to +100 °C
<
±1
±2
°C
Local temperature error
Tamb = 0 °C to +125 °C
<
±2
±3
°C
Remote temperature error
Tremote = +60 °C to +100 °C
±3
°C
Remote temperature error
Tremote = 0 °C to +125 °C
±5
°C
Under voltage lockout1
VDD supply (Note 2)
2.7
2.95
V
Power-on reset threshold
VDD supply (falling edge) (Note 3)
1.0
2.5
V
Power supply current (average)
Conversion rate = 0.25/sec
70
µA
Power supply current (average)
Conversion rate = 2/sec
180
µA
Power supply current (standby)
SMBus inactive
3
10
µA
Conversion time
From stop bit to conversion complete,
both channels
170
ms
Conversion rate error
Percentage error in programmed rate
–30
+30
%
Remote sensor source current
HIGH level
100
µA
Remote sensor source current
LOW level
10
µA
Address pin bias current
Momentary as the address is being read
(Notes 4 and 5)
160
µA
NOTES:
1. Definition of Under Voltage Lockout (UVL): The value of VDD below which the internal A/D converter is disabled. This is designed to be a
minimum of 200 mV above the power-on reset. During the time that it is disabled, the temperature that is in the “read temperature registers”
will remain at the value that it was before the A/D was disabled. This is done to eliminate the possibility of reading unexpected false
temperatures due to the A/D converter not working correctly due to low voltage. In case of power-up (rising VDD), the reading that is stored
in the “read temperature registers” will be the default value of 0
°C. As soon as VDD has risen to the value of UVL, the A/D will function
correctly and normal temperatures will be read.
2. VDD (rising edge) voltage below which the ADC is disabled.
3. VDD (falling edge) voltage below which the logic is reset.
4. Address is read a power up and at start of conversion for all conversions except the fastest rate.
5. Due to the bias current, any pull-up/down resistors should be
≤ 2 kΩ.


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