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AOD607 Datasheet(PDF) 5 Page - Alpha & Omega Semiconductors |
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AOD607 Datasheet(HTML) 5 Page - Alpha & Omega Semiconductors |
5 / 7 page AOD607 Symbol Min Typ Max Units BVDSS -30 V -0.003 -1 TJ=55°C -5 IGSS ±100 nA VGS(th) -1.2 -2 -2.4 V ID(ON) -40 A 30 37 TJ=125°C 42 50 50 62 m Ω gFS 17 S VSD -0.76 -1 V IS -18 A Ciss 920 1100 pF Coss 190 pF Crss 122 pF Rg 3.6 5 Ω Qg(10V) 18.7 23 nC Qg(4.5V) 9.7 11.7 nC Qgs 2.54 nC Qgd 5.4 nC tD(on) 913 ns tr 25 35 ns tD(off) 20 30 ns tf 12 18 ns trr 21.4 26 ns Qrr 13 16 nC THIS PRODUCT HAS BEEN DESIGNED AND QUALIFIED FOR THE CONSUMER MARKET. APPLICATIONS OR USES AS CRITICAL COMPONENTS IN LIFE SUPPORT DEVICES OR SYSTEMS ARE NOT AUTHORIZED. AOS DOES NOT ASSUME ANY LIABILITY ARISING OUT OF SUCH APPLICATIONS OR USES OF ITS PRODUCTS. AOS RESERVES THE RIGHT TO IMPROVE PRODUCT DESIGN, FUNCTIONS AND RELIABILITY WITHOUT NOTICE Body Diode Reverse Recovery Time Body Diode Reverse Recovery Charge IF=-12A, dI/dt=100A/µs Drain-Source Breakdown Voltage On state drain current ID=-250µA, VGS=0V VGS=-10V, VDS=-5V VGS=-10V, ID=-12A Reverse Transfer Capacitance IF=-12A, dI/dt=100A/µs P-Channel Electrical Characteristics (TJ=25°C unless otherwise noted) STATIC PARAMETERS Parameter Conditions IDSS µA Gate Threshold Voltage VDS=VGS ID=-250µA VDS=-24V, VGS=0V VDS=0V, VGS=±20V Zero Gate Voltage Drain Current Gate-Body leakage current RDS(ON) Static Drain-Source On-Resistance Forward Transconductance Diode Forward Voltage m Ω VGS=-4.5V, ID=-5A IS=-1A,VGS=0V VDS=-5V, ID=-12A Turn-On Rise Time Turn-Off DelayTime VGS=-10V, VDS=-15V, RL=1.25Ω, RGEN=3Ω Gate resistance VGS=0V, VDS=0V, f=1MHz Turn-Off Fall Time SWITCHING PARAMETERS Total Gate Charge (4.5V) Gate Source Charge Maximum Body-Diode Continuous Current Input Capacitance Output Capacitance Turn-On DelayTime DYNAMIC PARAMETERS VGS=0V, VDS=-15V, f=1MHz Gate Drain Charge Total Gate Charge (10V) VGS=-10V, VDS=-15V, ID=-12A A: The value of RθJA is measured with the device mounted on 1in 2 FR-4 board with 2oz. Copper, in a still air environment with T A =25°C. The Power dissipation PDSM is based on steady-state R θJA and the maximum allowed junction temperature of 150°C. The value in any given application depends on the user's specific board design, and the maximum temperature fo 175°C may be used if the PCB or heatsink allows it. B. The power dissipation PD is based on TJ(MAX)=175°C, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. It is used to determine the current rating, when this rating falls below the package limit. C: Repetitive rating, pulse width limited by junction temperature TJ(MAX)=175°C. D. The R θJA is the sum of the thermal impedence from junction to case R θJC and case to ambient. E. The static characteristics in Figures 1 to 6 are obtained using <300 µs pulses, duty cycle 0.5% max. F. These tests are performed with the device mounted on 1 in 2 FR-4 board with 2oz. Copper, in a still air environment with T A=25°C. The SOA curve provides a single pulse rating. G. The maximum current rating is limited by the package current capability. Rev0 : March 2006 Alpha & Omega Semiconductor, Ltd. |
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