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FDS6675BZ Datasheet(PDF) 2 Page - Fairchild Semiconductor |
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FDS6675BZ Datasheet(HTML) 2 Page - Fairchild Semiconductor |
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2 / 6 page  FDS6675BZ Rev. B www.fairchildsemi.com 2 Electrical Characteristics T J = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Off Characteristics BVDSS Drain to Source Breakdown Voltage ID = -250µA, VGS = 0V -30 V ∆BVDSS ∆TJ Breakdown Voltage Temperature Coefficient ID = -250µA, referenced to 25°C -20 mV/°C IDSS Zero Gate Voltage Drain Current VDS = -24V, VGS = 0V -1 µA IGSS Gate to Source Leakage Current VGS = ±25V, VDS = 0V ±10 µA On Characteristics VGS(th) Gate to Source Threshold Voltage VGS = VDS, ID = -250µA -1 -2 -3 V ∆VGS(th) ∆TJ Gate to Source Threshold Voltage Temperature Coefficient ID = -250µA, referenced to 25°C 15.7 mV/°C rDS(on) Drain to Source On Resistance VGS = -10V , ID = -11A 10.8 13.0 m Ω VGS = -4.5V, ID = -9A 17.4 21.8 VGS = -10V, ID = -11A TJ = 125oC 15.0 18.8 gFS Forward Transconductance VDS = -5V, ID = -11A 34 S (Note 2) Dynamic Characteristics Ciss Input Capacitance VDS = -15V, VGS = 0V, f = 1MHz 1855 2470 pF Coss Output Capacitance 335 450 pF Crss Reverse Transfer Capacitance 330 500 pF Switching Characteristics (Note 2) td(on) Turn-On Delay Time VDD = -15V, ID = -11A VGS = -10V, RGS = 6Ω 3.0 10 ns tr Rise Time 7.8 16 ns td(off) Turn-Off Delay Time 120 200 ns tf Fall Time 60 100 ns Qg Total Gate Charge VDS = -15V, VGS = -10V, ID = -11A 44 62 nC Qg Total Gate Charge VDS = -15V, VGS = -5V, ID = -11A 25 35 nC Qgs Gate to Source Gate Charge 7.2 nC Qgd Gate to Drain Charge 11.4 nC Drain-Source Diode Characteristics VSD Source to Drain Diode Forward Voltage VGS = 0V, IS = -2.1A -0.7 -1.2 V trr Reverse Recovery Time IF = -11A, di/dt = 100A/µs 42 ns Qrr Reverse Recovery Charge IF = -11A, di/dt = 100A/µs 30 nC Notes: 1: RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed by design while RθCA is determined by the user’s board design. Scale 1 : 1 on letter size paper 2: Pulse Test:Pulse Width <300 µs, Duty Cycle <2.0% 3: The diode connected between the gate and source serves only as protection against ESD. No gate overvoltage rating is implied. a) 50 °C/W when mounted on a 1 in2 pad of 2 oz copper minimun pad c) 125 °C/W when mounted on a b)105 °C/W when mounted on a .04 in2 pad of 2 oz copper |
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