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SY100EL16VOKI Datasheet(PDF) 1 Page - Micrel Semiconductor |
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SY100EL16VOKI Datasheet(HTML) 1 Page - Micrel Semiconductor |
1 / 6 page DESCRIPTION FEATURES 3.3V/5V 800MHz PRECISION PECL AMPLIFIER WITH LOW GAIN FEEDBACK SY100EL16VO FINAL s 3.3V and 5V ±10% power supply options s Guaranteed AC parameters over temperature: •f MAX = 800MHz • < 200ps differential propagation delay (D to Q FB) • < 730ps differential propagation delay (D to Q HG) • < 250ps t r /tf s Low gain feedback path Q FB = +10V/V s Output enable s V BB reference output voltage s Wide temperature range: –40 °C to +85°C s Available in 10-pin (3 ×××××3mm) MSOP PIN CONFIGURATION BLOCK DIAGRAM /EN QFB /QFB D /D VBB QHG VEE VCC /QHG D LEN Q LATCH 1 Rev.: C Amendment: /0 Issue Date: February 2003 VBB /EN 6 5 1 QFB /QFB D /D 10 VCC QHG /QHG VEE 9 8 7 2 3 4 Pin Function Q FB, /QFB Differential clock outputs for feedback path: Nominal DC gain +10. D, /D PECL, LVPECL, ECL, LVECL differential inputs: Internal 75k Ω pull-down resistor. V BB V CC –1.32V reference voltage for single-ended inputs: It provides the switching reference for the input differential amplifier. When unused, it can be left open. For single-ended PECL applications connect V BB to /D input, and bypass with a 0.01µF capacitor to V CC. /EN Enable: PECL compatible input control with internal 75k Ω pull-down resistor. It controls the high-gain output (Q HG). When HIGH, QHG is low and /QHG is high. /EN is synchronous so that the outputs will only be enabled/disabled when they are in the LOW state. V EE Negative power supply: For ECL/LVECL operation, connect to negative supply. For PECL/ LVPECL operation, connect to GND. Q HG, /QHG Differential high-gain outputs: Nominal DC gain is greater than +200. V CC Positive power supply: For ECL/LVECL operation, connect to V CC = 0V. For PECL/ LVPECL operation, connect to either 3.3V or 5.0V. Bypass with 0.1 µF// 0.01 µF low ESR capacitors. PIN NAMES The SY100EL16VO is a differential receiver amplifier optimized for crystal oscillator applications. The device includes an additional low gain (+10V/V) output stage (Q FB) ideal for feedback applications common in crystal oscillator gain blocks. The SY100EL16VO is fully differential, with a bandwidth > 800MHz over temperature and voltage. For applications that require output disable control, an Enable pin (/EN) will force the differential output into a fixed logic state. The SY100EL16VO also includes a V BB reference voltage for single-ended or AC-coupled applications. The SY100EL16VO PECL logic is 100k ECL compatible. Operation is guaranteed over the –40 °C to +85°C temperature range and 3.3V to 5V nominal supply voltage range. /EN QHG Out /QHG Out 0 Data /Data 1 Logic Low Logic High TRUTH TABLE |
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