9 / 18 page
PRELIMINARY
CY7C1327G
Document #: 38-05519 Rev. *A
Page 9 of 18
ISB3
Automatic CE
Power-down
Current—CMOS Inputs
VDD = Max, Device
Deselected, or VIN ≤ 0.3V
or VIN > VDDQ – 0.3V
f = fMAX = 1/tCYC
4-ns cycle,250MHz
105
mA
4.4-ns cycle,225MHz
100
mA
5-ns cycle,200MHz
95
mA
6-ns cycle,166MHz
85
mA
7.5-ns cycle,133MHz
75
mA
10-ns cycle,100MHz
65
mA
ISB4
Automatic CE
Power-down
Current—TTL Inputs
VDD = Max, Device
Deselected, VIN ≥ VIH or
VIN ≤ VIL, f = 0
All speeds
45
mA
Thermal Resistance[9]
Parameter
Description
Test Conditions
TQFP Package
BGA Package
Unit
Θ
JA
Thermal Resistance
(Junction to Ambient)
Test conditions follow standard test
methods and procedures for measuring
thermal impedance, per EIA / JESD51.
TBD
TBD
°C/W
Θ
JC
Thermal Resistance
(Junction to Case)
TBD
TBD
°C/W
Capacitance[9]
Parameter
Description
Test Conditions
TQFP Package
BGA Package Unit
CIN
Input Capacitance
TA = 25°C, f = 1 MHz,
VDD = 3.3V.
VDDQ = 3.3V
55
pF
CCLK
Clock Input Capacitance
5
5
pF
CI/O
Input/Output Capacitance
5
7
pF
Electrical Characteristics Over the Operating Range (continued)[7, 8]
Parameter
Description
Test Conditions
Min.
Max.
Unit
AC Test Loads and Waveforms
Notes:
9. Tested initially and after any design or process change that may affect these parameters.
OUTPUT
R = 317
Ω
R = 351
Ω
5pF
INCLUDING
JIG AND
SCOPE
(a)
(b)
OUTPUT
RL = 50Ω
Z0 = 50Ω
VT = 1.5V
3.3V
ALL INPUT PULSES
VDDQ
GND
90%
10%
90%
10%
≤ 1ns
≤ 1ns
(c)
OUTPUT
R = 1667
Ω
R =1538
Ω
5pF
INCLUDING
JIG AND
SCOPE
(a)
(b)
OUTPUT
RL = 50Ω
Z0 = 50Ω
VT = 1.25V
2.5V
ALL INPUT PULSES
VDDQ
GND
90%
10%
90%
10%
≤ 1ns
≤ 1ns
(c)
3.3V I/O Test Load
2.5V I/O Test Load
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
