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CYNSE70032 Datasheet(PDF) 16 Page - Cypress Semiconductor

Part # CYNSE70032
Description  Network Search Engine
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CYNSE70032 Datasheet(HTML) 16 Page - Cypress Semiconductor

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CYNSE70032
Document #: 38-02042 Rev. *E
Page 16 of 126
9.1
Read Burst Address Register
Table 9-2 shows the Read burst address register (RBURREG) fields that must be programmed before a burst Read.
9.2
Write Burst Address Register Description
Table 9-3 describes the Write burst address register (WBURREG) fields that must be programmed before a burst Write.
9.3
NFA Register
Bit[0] of each 68-bit data entry is specially designated for use in the operation of the Learn command. For 68-bit-configured
quadrants, this bit indicates whether a location is full (bit set to 1) or empty (bit set to 0). Every Write or Learn command loads
the address of the first 68-bit location containing a 0 into the entry’s bit[0]. This is stored in the NFA register (see Table 9-4). If all
the bits[0] in a device are set to 1, the CYNSE70032 asserts FULO[1:0] to 1.
For a 136-bit-configured quadrants, the LSB of the NFA register is always set to 0. The host ASIC must set both bit[0] and bit[68]
in a 136-bit word to either 0 or 1 to indicate full or empty status. Both bit[0] and bit[68] must be set to either 0 or 1, (that is, the 10
or 01 settings are invalid).
Table 9-2. Read Burst Register Description
Field
Range
Initial Value
Description
ADR
[13:0]
0
Address. This is the starting address of the data or mask array during a burst Read
operation. It automatically increments by one for each successive Read of the data or
mask array. Once the operation is complete, the contents of this field must be reinitialized
for the next operation.
[18:14]
Reserved.
BLEN
[27:19]
0
Length of Burst Access. The device provides the capability to Read from 4–511 locations
in a single burst. The BLEN decrements automatically. Once the operation is complete,
the contents of this field must be reinitialized for the next operation.
[67:28]
Reserved.
Table 9-3. Write Burst Register Description
Field
Range
Initial Value
Description
ADR
[13:0]
0
Address. This is the starting address of the data or mask array during a burst
Write operation. It automatically increments by one for each successive write of
the data or mask array. Once the operation is complete, the contents of this field
must be reinitialized for the next operation.
[18:14]
Reserved.
BLEN
[27:19]
0
Length of Burst Access. The device provides the capability to write from 4–511
locations in a single burst. The BLEN decrements automatically. Once the
operation is complete, the contents of this field must be reinitialized for the next
operation.
[67:28]
Reserved.
Table 9-4. NFA Register
Address
67–14
13–0
60
Reserved
Index


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