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CYNSE70032 Datasheet(PDF) 91 Page - Cypress Semiconductor

Part # CYNSE70032
Description  Network Search Engine
Download  126 Pages
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Manufacturer  CYPRESS [Cypress Semiconductor]
Direct Link  http://www.cypress.com
Logo CYPRESS - Cypress Semiconductor

CYNSE70032 Datasheet(HTML) 91 Page - Cypress Semiconductor

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CYNSE70032
Document #: 38-02042 Rev. *E
Page 91 of 126
13.10
Mixed-Size Searches on Tables Configured with Different Widths Using an CYNSE70032 Device
This subsection will cover mixed searches (×68, ×136, and ×272) with tables of different widths (×68, ×136, ×272). The sample
operation shown is for a single device with CFG = 10010000 containing three tables of ×68, ×136, and ×272 widths. The operation
can be generalized to a block of 8–31 devices using four blocks; the timing and the pipeline operation is the same as described
previously for fixed searches on a table of one-width-size.
Figure 13-67 shows three sequential searches: first, a 68-bit Search on the table configured as ×68, then a 136-bit search on a
table configured as ×136, and finally a 272-bit search on the table configured as ×272 bits. Each results in a hit. Note.The
DQ[67:66] will be 00 in each of the two A and B cycles of the ×68-bit Search (Search1). DQ[67:66] is 01 in each of the A and B
cycles of the ×136-bit Search (Search2). DQ[67:66] is 10 in each of the A, B, C, and D cycles of the ×272-bit Search (Search3).
By having table designation bits, the CYNSE70032 device enables the creation of many tables of different widths in a bank of
search engines.
Figure 13-68 shows the sample table. Two bits in each 68-bit entry need to designated as table number bits. One example choice
might be: the 00 values for the table configured as ×68, 01 values for tables configured as ×136, and 10 values for tables
configured as ×272. For the above explanation, it is further assumed that bits[67:66] for each entry will be designed as such table
designation bits.
cycle
CLK2X
CMDV
CMD[1:0]
CE_L
OE_L
CMD[8:2]
WE_L
1
cycle
2
cycle
3
cycle
4
cycle
5
cycle
6
cycle
7
cycle
8
cycle
9
cycle
10
CFG = 1010101010101010, HLAT = 010, TLSZ = 00, LRAM = 1, LDEV = 1
PHS_L
SADR[21:0]
SSF
SSV
ALE_L
Search1 Search2
A2
01
01
Search1
Search3
A B A B A B A B
0
1
0
10
0
1
1
0
1
0
AB A B A B C D
DQ
D1
D3
CMD[2]
10
1
1
0
1
A3
Search2
01
D2
1
1
0
0
0
0
1
0
1
×68 hit ×136 hit
Search3
×272 hit
A1
A3
Figure 13-67. Timing Diagram for Mixed Search (One Device)
1 K
8 K
68
2 K
136
272
CFG = 10010000
Figure 13-68. Multiwidth Configurations Example


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