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MSM518222A Datasheet(PDF) 1 Page - OKI electronic componets

Part No. MSM518222A
Description  262,214-Word X 8-Bit Field Memory
Download  17 Pages
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Manufacturer  OKI [OKI electronic componets]
Direct Link  http://www.oki.com
Logo OKI - OKI electronic componets

MSM518222A Datasheet(HTML) 1 Page - OKI electronic componets

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¡ Semiconductor
MSM518222A
1/16
DESCRIPTION
The OKI MSM518222A is a high performance 2-Mbit, 256K ¥ 8-bit, Field Memory. It is designed
for high-speed serial access applications such as HDTVs, conventional NTSC TVs, VTRs, digital
movies and Multi-media systems. It is a FRAM for wide or low end use as general commodity
TVs and VTRs, exclusively. The MSM518222A is not designed for the other use or high end use
in medical systems, professional graphics systems which require long term picture, and data
storage systems and others. The 2-Mbit capacity fits one field of a conventional NTSC TV screen.
Two cascaded MSM518222As make one frame of the screen: two or more MSM518222As can be
cascaded directly without any delay devices between them. (Cascading provides larger storage
depth or a longer delay).
Each of the 8-bit planes has separate serial write and read ports. These employ independent control
clocks to support asynchronous read and write operations. Different clock rates are also supported,
which allow alternate data rates between write and read data streams.
TheMSM518222AprovideshighspeedFIFO,First-InFirst-Out,operationwithoutexternalrefreshing:
it refreshes its DRAM storage cells automatically, so that it appears fully static to the users.
Moreover, fully static type memory cells and decoders for serial access enable the refresh free serial
access operation, so that serial read and/or write control clock can be halted high or low for any
duration as long as the power is on. Internal conflicts of memory access and refreshing operations
are prevented by special arbitration logic.
The MSM518222A's function is simple, and similar to a digital delay device whose delay-bit-length
is easily set by reset timing. The delay length, and the number of read delay clocks between write
and read, is determined by externally controlled write and read reset timings.
Additional SRAM serial registers, or line buffers for the initial access of 256 ¥ 8-bit enable high speed
first-bit-access with no clock delay just after the write or read reset timings.
The MSM518222A is similar in operation and functionality to OKI 1-Mbit Field Memory
MSM514221B, with the addition of cascade capability. (As for MSM514221B operation compatible
2-Mbit Field Memory, OKI has the MSM518221A which is a sister device of MSM518222A).
Additionally, the MSM518222A has a write mask function or input enable function (IE), and read-
data skipping function or output enable function (OE). The differences between write enable (WE)
and input enable (IE), and between read enable (RE) and output enable (OE) are that WE and RE can
stop serial write/read address increments, but IE and OE cannot stop the increment, when write/
read clocking is continuously applied to MSM518222A. The input enable (IE) function allows the
user to write into selected locations of the memory only, leaving the rest of the memory contents
unchanged. This facilitates data processing to display a "picture in picture" on a TV screen.
¡ Semiconductor
MSM518222A
262,214-Word
¥ 8-Bit Field Memory
E2L0067-18-Z2
This version: Dec. 1998


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