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MSM518222A Datasheet(PDF) 5 Page - OKI electronic componets

Part No. MSM518222A
Description  262,214-Word X 8-Bit Field Memory
Download  17 Pages
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Maker  OKI [OKI electronic componets]
Homepage  http://www.oki.com
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MSM518222A Datasheet(HTML) 5 Page - OKI electronic componets

 
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¡ Semiconductor
MSM518222A
5/16
OPERATION
Write Operation
The write operation is controlled by three clocks, SWCK, RSTW, and WE. Write operation is
accomplished bycyclingSWCK,and holding WE high after the write address pointer reset operation
or RSTW.
Each write operation, which begins after RSTW, must contain at least 80 active write cycles, i.e.
SWCK cycles while WE is high. To transfer the last data to the DRAM array, which at that time
is stored in the serial data registers attached to the DRAM array, an RSTW operation is required
after the last SWCK cycle.
Note that every write timing of MSM518222A is delayed by one clock compared with read timings
for easy cascading without any interface delay devices.
Write Reset : RSTW
The first positive transition of SWCK after RSTW becomes high resets the write address counters to
zero. RSTW setup and hold times are referenced to the rising edge of SWCK. Because the write reset
function is solely controlled by the SWCK rising edge after the high level of RSTW, the states of WE
and IE are ignored in the write reset cycle.
Before RSTW may be brought high again for a further reset operation, it must be low for at least two
SWCK cycles.
Data Inputs : DIN0 - 7
Write Clock : SWCK
The SWCK latches the input data on chip when WE is high, and also increments the internal write
addresspointer. Data-insetuptimetDS,andholdtimetDHarereferencedtotherisingedgeofSWCK.
Write Enable : WE
WE is used for data write enable/disable control. WE high level enables the input, and WE low level
disables the input and holds the internal write address pointer. There are no WE disable time (low)
and WE enable time (high) restrictions, because the MSM518222A is in fully static operation as long
as the power is on. Note that WE setup and hold times are referenced to the rising edge of SWCK.
Input Enable : IE
IE is used to enable/disable writing into memory. IE high level enables writing. The internal write
addresspointerisalwaysincrementedbycyclingSWCKregardlessoftheIElevel. NotethatIEsetup
and hold times are referenced to the rising edge of SWCK.


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